Integrations and challenges of novel high-k gate stacks in advanced CMOS technology

Progress in Materials Science

Volumn 56, Issue 5, 2011, Pages 475-572

  He, Gang ^a,c   Zhu, Liqiang ^b,c   Sun, Zhaoqi ^a   Wan, Qing ^b   Zhang, Lide ^c  

^a ANHUI UNIVERSITY   (China)

^b NINGBO INSTITUTE OF MATERIALS TECHNOLOGY AND ENGINEERING   (China)

^c INSTITUTE OF SOLID STATE PHYSICS   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ENERGY GAP; GATE DIELECTRICS; GATES (TRANSISTOR); LOGIC GATES; METALS; MOS DEVICES; OXIDE SEMICONDUCTORS; THRESHOLD VOLTAGE; TRANSISTORS;

ADVANCED CMOS DEVICE; CMOS FIELD-EFFECT TRANSISTORS; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; GATE STACK TECHNOLOGY; HIGH DIELECTRIC CONSTANT (HIGH-K); INTERFACE ENGINEERING; THRESHOLD-VOLTAGE INSTABILITIES; TRANSISTOR STRUCTURE;

HIGH-K DIELECTRIC;

EID: 79952450060     PISSN: 00796425     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.pmatsci.2011.01.012     Document Type: Review

References (442)

1. P. Packan Pushing the limits Science 285 1999 2079 2081
2. G.D. Wilk, R.M. Wallace, and J.M. Anthony High-k gate dielectrics: current status and materials properties considerations J Appl Phys 89 2001 5243 5275 (Pubitemid 33598307)
3. 3 post-deposition anneal Appl Phys Lett 82 2003 1757 1759
4. 2/Si by the plasma oxidation of sputtered metallic Hf thin films J Cryst Growth 268 2004 155 162
5. T. Tanimura, S. Toyoda, H. Kamada, H. Kumigashira, M. Oshima, and T. Sukegawa Photoinduced charge-trapping phenomena in metal/high-k gate stack structures studied by synchrotron radiation photoemission spectroscopy Appl Phys Lett 96 2010 16290
6. T. Tanimura, S. Toyoda, H. Kamada, H. Kumigashira, M. Oshima, and G.L. Liu Relationship between band alighnemt and chemical states upon annealing in HfSiON/SiON stacked films on Si substrates Appl Phys Lett 95 2009 183113
7. y gate dielectric films Mater Sci Semicond Process 9 2006 870 875 (Pubitemid 46073836)
8. 2 films on Si(1 0 0) Surf Sci 576 2005 67 75 (Pubitemid 40146258)
9. 2 films on Si substrates by in-depth profile analysis using photoemission spectroscopy J Appl Phys 106 2009 064103
10. 2/Si gate stacks Appl Phys Lett 91 2007 232910
11. y gate dielectrics J Appl Phys 104 2008 104116
12. A.I. Kingon, J.P. Maria, and S.K. Streiffer Alternative dielectrics to silicon dioxide for memory and logic devices Nature 406 2000 1032 1038
13. J. Robertson High dielectric constant gate oxides for metal oxide Si transistors Rep Prog Phys 69 2006 327 396 (Pubitemid 43121643)
14. B.H. Lee, J.W. Oh, H.H. Tseng, R. Jammy, and H. Huff Gate stack technology for nanoscale devices Mater Today 9 2006 32 40 (Pubitemid 43783459)
15. G. He, and L.D. Zhang Current progress of Hf (Zr)-based high-k gate dielectric thin films J Mater Sci Technol 23 2007 433 448 (Pubitemid 47270526)
16. G.E. Moore Progress in digital integrated electronics IEEE IEDM Tech Dig 21 1975 11 13
17. R.H. Dennard, F.H. Gaensslen, V.L. Rideout, E. Bassous, and A.R. LeBlanc Design of ion-implanted MOSFET's with very small physical dimensions IEEE J Solid-State Circuits 9 1974 256 268
18. M. Schulz The end of the road for silicon? Nature 399 1999 729 730 (Pubitemid 29293151)
19. D.A. Muller, T. Sorsch, S. Moccio, F. Baumann, K. Evans-Lutterodt, and G. Timp The electronic structure at the atomic scale of ultrathin gate oxide Nature 399 1999 758 761 (Pubitemid 29293166)
20. M. Schulz The end of the road for silicon? Nature 399 1999 729 730 (Pubitemid 29293151)
21. T. Ghani, S. Ahmed, P. Aminzadeh, J. Bielefeld, P. Charvat, and C. Chu 100 nm gatelength high performance/low power CMOS transistor structure IEDM Tech Digest 1999 415 418 (Pubitemid 30574496)
22. M. Hargrove, S. Crowder, E. Nowak, R. Logan, L. Han, and H. Ng High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay IEDM Tech Dig 1998 627 630
23. M. Rodder, S. Hattangady, N. Yu, W. Shiau, P. Nicollian, and T. Laaksonen A 1.2 V, 0.1 μm gate length CMOS technology: design and process issues IEEE IEDM Tech Dig 1998 623 626
24. S.H. Lo, D. Buchanan, and Y. Taur Modeling and characterization of quantization, polysilicon depletion, and direct tunelling effects in MOSFETs with ultrathin oxides IBM J Res Dev 43 1999 327 338
25. 2 and Si-O-N gate dielectric layers for silicon microelectronics: understanding the processing, structure, and physical and electrical limits J Appl Phys 90 2001 2057 2121 (Pubitemid 33600615)
26. C.Y. Chang, C.C. Chen, H.C. Lin, M.S. Liang, C.H. Chien, and T.Y. Huang Reliability of ultrathin gate oxides for ULSI devices Microelectron Reliab 39 1999 553 566
27. + polysilicon gated PMOS devices IEEE Trans Electron Dev 37 1990 1842 1851
28. B.E. Weir, M.A. Alam, J.D. Bude, P.J. Silverman, A. Ghetti, and F. Baumann Gate oxide reliability projection to the sub-2 nm regime Semicond Sci Technol 15 2000 455 461
29. The International Technology Roadmap for Semiconductors (ITRS). < http://www.itrs.net >.
30. K.J. Hubbard, and D.G. Schlom Thermodynamic stability of binary oxides in contact with silicon J Mater Res 11 1996 2757 2776 (Pubitemid 126531137)
31. y/Si gate stacks revealed by synchrotron radiation photoemission spectroscopy Appl Surf Sci 257 2010 1638 1642
32. 3 thin films Mater Lett 62 2008 4235 4237
33. 2 gate oxides Appl Phys Lett 92 2008 202906
34. 2 thin films by nitrogen-assisted reactive magnetron sputtering Mater Sci Semicon Process 9 2006 1025 1030 (Pubitemid 46073858)
35. y gate dielectrics J Phys D: Appl Phys 42 2009 195304
36. D.J. Frank, Y. Taur, and H.S.P. Wong Generalized scale length for two-dimensional effects in MOSFET's IEEE Electron Dev Lett 19 1998 385 387 (Pubitemid 128573413)
37. J. Robertson High dielectric constant oxides Eur Phys J Appl Phys 28 2004 265 291 (Pubitemid 40002196)
38. S. Miyazaki Photoemission study of energy-band alignments and gap-state density distributions for high-k gate dielectrics J Vac Sci Technol B 19 2001 2212 2216 (Pubitemid 34089722)
39. 2-based dielectric stacks: internal electron photoemission measurements Microelectron Eng 59 2001 335 339 (Pubitemid 33018434)
40. V.V. Afanas'ev, A. Stesmans, and W. Tsai Determination of interface energy band diagram between (1 0 0)Si and mixed Al-Hf oxides using internal electron photoemission Appl Phys Lett 82 2003 245 247
41. P. Balk Dielectrics for field-effect technology Adv Mater 7 1995 703 710
42. S. Guha Compatibility challenges for high-k materials integration into CMOS technology MRS Bull 27 2002 226 229 (Pubitemid 34277044)
43. P.D. Agnello Process requirements for continued scaling of CMOS-the need and prospect for atomic-level manipulation IBM J Res Dev 46 2002 317 338 (Pubitemid 34692354)
44. R.T. Tung Recent advances in Schottky barrier concepts Mater Sci Eng 35 2001 1 138
45. V. Heine Theory of surface states Phys Rev 138 1965 1689 1696
46. J. Tersoff Theory of semiconductor heterojunction: the role of quantum dipoles Phys Rev B 30 1984 4477 4874
47. W. Monch Barrier heights of real Schottky contacts explained by metal-induced gap states and lateral inhomogeneities J Vac Sci Technol B 17 1999 1876 1897
48. R.T. Tung Chemical bonding and Fermi level pinning at metal-semiconductor interfaces Phys Rev Lett 84 2000 6078 6081
49. C.C. Hobbs, L.R.C. Fonseca, A. Knizhnik, V. Dhandapani, S.B. Samavedam, and W.J. Taylor Fermi level pinning at the polysilicon/metal oxide interface-Part II IEEE Trans Electron Dev 51 2004 978 984
50. C.C. Hobbs, L.R.C. Fonseca, A. Knizhnik, V. Dhandapani, S.B. Samavedam, and W.J. Taylor Fermi level pinning at the polysilicon/metal oxide interface-Part I IEEE Trans Electron Dev 51 2004 971 977
51. Y.C. Yeo, T.J. King, and C. Hu Metal-delectric band alignment and its implications for metal gate complementary metal-oxide-semiconductor ntechnology J Appl Phys 92 2002 7266 7271
52. H.Y. Yu, C. Ren, Y.C. Yeo, J.F. Kang, X.P. Wang, and H.H.H. Ma Fermi pinning-induced thermal instability of metal-gate work functions IEEE Electron Dev Lett 25 2004 337 339
53. L. Machanda, and M. Gurvitch Yttrium oxide/silicon dioxide: a new dielectric structure for VLSI/ULSI circuits IEEE Electron Dev Lett 9 1988 180 182 (Pubitemid 18612194)
54. 3 films on silicon Appl Phys Lett 55 1989 360 362
55. 2 layers on silicon Appl Phys Lett 56 1990 1332 1334
56. 2 films on Si(111) by sputtering Jpn J Appl Phys 33 1994 270 274
57. 2 dielectrics IEEE Trans Electron Dev 44 1997 104 109 (Pubitemid 127761355)
58. 2O J Vac Sci Technol B 16 1998 2115 2117
59. 5 films and conventional gate dielectrics IEEE Electron Dev Lett 19 1998 341 342 (Pubitemid 128577945)
60. B.H. Lee, Y.J. Jeon, K. Zawadzki, W.J. Qi, and J.C. Lee Effects of interfacial layer growth on the electrical characteristics of thin titanium oxide films on silicon Appl Phys Lett 74 1999 3143 3145 (Pubitemid 129306708)
61. 2 gate dielectric films Appl Sur Sci 253 2007 3413 3418 (Pubitemid 46123678)
62. 2/Si(1 0 0) by nitrogen-assisted reactive sputtering J Phys D: Appl Phys 39 2006 5285 5289
63. G. He, J.X. Zhang, L.Q. Zhu, M. Liu, Q. Fang, and L.D. Zhang Structural, interfacial and optical characterization of ultrathin Zirconia film grown by in situ thermal oxidation of sputtered metallic Zr films Nanotechnology 16 2005 1641 1647 (Pubitemid 41107825)
64. L.Q. Zhu, Q. Fang, G. He, M. Liu, and L.D. Zhang Microstructure and optical properties of ultra thin Zirconia films prepared by nitrogen assisted reactive magnetron sputtering Nanotechnology 6 2005 2865 2869 (Pubitemid 41677043)
65. J.K. Park, E.T. Lee, B.K. Kim, S.W. Jeong, and Y.H. Roh Characteristics of Hf-silicate interfacial layers formed by wet etching J Korean Phys Soc 55 2009 1022 1025
66. D. Tahir, E.K. Lee, S.K. Oh, H.J. Kang, S. Heo, and J.G. Chung Dielectric and optical properties of Zr silicate thin films grown on Si(1 0 0) by atomic layer deposition J Appl Phys 106 2009 084108
67. M.A. Quevedo-Lopez, S.A. Krishnan, P.D. Kirsch, H.J. Li, J.H. Sim, and C. Huffman High performance gate first HfSiON dielectric satisfying 45 nm node requirements IEDM Tech Dig 2005 438 441
68. A.C. Diebolda, D. Venablesb, Y. Chabalc, D. Mullerc, M. Weldonc, and E. Garfunkeld Characterization and production metrology of thin transistor gate oxide films Mater Sci Semicond Process 2 1999 103 147
69. B.W. Busch, O. Pluchery, Y.J. Chabal, D.A. Muller, R.L. Opila, and J.R. Kwo Materials characterization of alternative gate dielectrics MRS Bulletin 27 2002 206 211 (Pubitemid 34271854)
70. 3 films on Si(1 0 0) substrates Appl Phys A 78 2004 921 923
71. 2 gate dielectrics by metal-organic chemical vapor deposition Appl Surf Sci 256 2010 2496 2499
72. J.P.D. Souza, E. Kiewra, Y. Sun, A. Callegari, D.K. Sadana, and ShahidiG Inversion mode n-channel GaAs field effect transistor with high-k/metal gate Appl Phys Lett 92 2008 153508
73. y thin films deposited by PECVD Surf Coat Tech 201 2007 5336 5339
74. B.S. Lim, A. Rahtu, and R.G. Gordon Atomic layer deposition of transition metals Nat Mater 2 2003 749 754
75. D. Hausmann, J. Becker, S.L. Wang, and R.G. Gordon Rapid vapor deposition of highly conformal silica nanolaminates Science 298 2002 402 406 (Pubitemid 35189565)
76. 3 on GaAs (1 1 1)A by atomic layer deposition Appl Phys Lett 97 2010 162910
77. 3 as gate dielectrics Appl Phys Lett 94 2009 212104
78. 2 as interfacial passivation layer Appl Phys Lett 97 2010 012106
79. 4 plasma treatment J Electrochem Soc 155 2008 G51 G55
80. J.Y. Zhang, and I.W. Boyd Ultrathin high-quality tantalum pentoxide films grown by photo-induced chemical vapor deposition Appl Phys Lett 77 2000 3574 3576
81. I.W. Boyd, and J.Y. Zhang Photo-induced growth of dielectrics with excimer lamps Solid State Electron 45 2001 1413 1431 (Pubitemid 32824923)
82. y dielectric films deposited by UV-photo-induced chemical vapour deposition (UV-CVD) Appl Sur Sci 253 2007 7869 7873 (Pubitemid 47058703)
83. 2/Si gate stacks. Surf Interface Anal; in press.
84. Q. Fang, J.Y. Zhang, Z.M. Wang, G. He, J. Yu, and I.W. Boyd High-k dielectrics by UV photo-assisted chemical vapour deposition Microelectron Eng 66 2003 621 630
85. 2/Hf stacked gate dielectrics Appl Phys Lett 81 2002 2053 2055
86. P.K. Roy, and I.C. Kizilyalli Stacked high-k gate dielectric for gigascale integration of metal-oxide-semiconductor technologies Appl Phys Lett 72 1998 2835 2837 (Pubitemid 128671614)
87. J. Morais, L. Miotti, G.V. Soares, S.R. Teixeira, R. Pezzi, and K.P. Bastos Integrity of hafnium silicate/silicon dioxide ultrathin films on Si Appl Phys Lett 81 2002 2995 2997
88. 2 thin films prepared in nitrogen ambient by pulsed laser deposition J Phys D: Appl Phys 36 2003 389 393
89. 3 nanolaminate films Appl Surf Sci 252 2006 6206 6211 (Pubitemid 44093069)
90. 2 gate dielectrics grown by radio-frequency reactive sputtering Appl Phys Lett 86 2005 232901
91. 2 grown by the plasma oxidation of sputtered metallic Ti thin films Chem Phys Lett 395 2004 259 263
92. 2 underlayers Appl Phys Lett 83 2003 3546 3548
93. 2 and Si through in situ vacuum annealing Appl Phys Lett 86 2005 082904
94. J. Zhu, Z.G. Liu, and Y. Feng Thermal stability and electrical properties of pulsed laser-deposited Hf-silicate thin films for high-k gate dielectric applications J Phys D: Appl Phys 36 2003 3051 3056
95. J. Zhu, Z.G. Liu, and Y.R. Li Thermal stability and electrical properties of pulsed laser deposited Hf-aluminate thin films for high-k gate dielectric applications J Phys D: Appl Phys 38 2005 446 450 (Pubitemid 40253338)
96. 2 gate insulators studied by photoemission spectroscopy and X-ray absorption spectroscopy J Vac Sci Technol A 23 2005 1554 1557 (Pubitemid 43123934)
97. P.M. Voyles, D.A. Muller, and E.J. Kirkland Depth-dependent imaging of individual dopant atoms in silicon Microsc Microanal 10 2004 291 300 (Pubitemid 38531952)
98. K.V. Benthem, A.W. Lupini, M. Kim, H.S. Baik, S. Doh, and J.H. Lee Three-dimensional imaging of individual hafnium atoms inside a semiconductor device Appl Phys Lett 87 2005 034104
99. P.E. Batson, N. Dellby, and O.L. Krivanek Sub-angstrom resolution using aberration corrected electron optics Nature 418 2002 617 620
100. B. Foran, J. Barnett, P.S. Lysaght, M.P. Agustin, and S. Stemmer Characterization of advanced gate stacks for Si CMOS by electron energy loss spectroscopy in scanning transmission electron microscopy J Electron Spectrosc Related Phenomena 143 2005 149 158 (Pubitemid 40302811)
101. G.B. Alers, D.J. Werder, Y. Chabal, H.C. Lu, E.P. Gusev, and E. Garfunkel Intermixing at the tantalum oxide/silicon interface in gate dielectric structures Appl Phys Lett 73 1998 1517 1519 (Pubitemid 128671900)
102. 2/Si by reactive magnetron sputtering Mater Lett 60 2006 888 891 (Pubitemid 43012005)
103. y gate stacks grown by metalorganic chemical vapor deposition Appl Phys Exp 2 2009 075503
104. 2 interface transition layer Appl Phys Lett 71 1997 3504 3506 (Pubitemid 127613788)
105. 3annealing treatment Appl Phys Lett 88 2006 202902
106. C.J. Floss, F. Stadermann, J. Bradley, Z.R. Dai, S. Bajt, and G. Graham Carbon and nitrogen isotopic anomalies in an anhydrous interplanetary dust particle Science 303 2004 1355 1358 (Pubitemid 38269425)
107. Fraunhofe Center Nanoelectronic Technologies. Annual Report; 2009.
108. 2 films on Si(1 0 0) Appl Phys Lett 88 2006 232901
109. y thin films on Si(1 0 0) by radio frequency sputtering at different deposition temperatures Appl Surf Sci 254 2008 5439 5444
110. G. Pant, A. Gnade, M.J. Kim, R.M. Wallace, B.E. Gnade, and M.A. Quevedo-Lopez Effect of thickness on the crystallization of ultrathin HfSiON gate dielectrics Appl Phys Lett 88 2006 032901
111. 3 as high-k gate insulators Appl Phys Lett 94 2009 042901
112. 3/Si interface Appl Surf Sci 255 2008 758 760
113. 2 insulator J Rare Earth 28 2010 396 398
114. 3 high-k gate dielectrics deposited by magnetron sputtering J Phys: Conf Ser 152 2009 012004
115. H.D.B. Gottlob, M. Schmidt, M.C. Lemme, H. Kurz, I.Z. Mitrovic, and M. Werner Gd silicate: a high-k dielectric compatible with high temperature annealing J Vac Sci Technol B 27 2009 249 252
116. D.J. Lichtenwalner, J.S. Jur, A.I. Kingon, M.P. Agustin, Y. Yang, and S. Stemmer Lanthanum silicate gate dielectric stacks with subnanometer equivalent oxide thickness utilizing an interfacial silica consumption reaction J Appl Phys 98 2005 024314
117. M. Copel, N. Bojarczuk, L.F. Edge, and S. Guha Stability of terbium scandate on Si(1 0 0) Appl Phys Lett 97 2010 182901
118. M. Wagner, T. Heeg, J. Schubert, S. Lenk, S. Mantl, and C. Zhao Gadolinium scandate thin films as an alternative gate dielectric prepared by electron beam evaporation Appl Phys Lett 88 2006 172901
119. 3 thin films by atomic layer deposition using two precursor approaches J Mater Chem 16 2006 563 569 (Pubitemid 43324432)
120. 3 gate dielectric on Si Appl Phys Lett 76 2000 1324 1326
121. B.H. Lee, L. Kang, R. Nieh, W.J. Qi, and J.C. Lee Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing Appl Phys Lett 76 2000 1926 1928
122. W.J. Qi, B.H. Lee, R. Nieh, L. Kang, Y. Jeon, and K. Ohishi High-k gate dielectrics SPIE 3881 1999 24 32 (Pubitemid 30543462)
123. A. Feng, B.J. Mccoy, Z.A. Munir, and D. Cagliosto Wettability of transition metal oxide surfaces Mater Sci Eng A 242 1998 50 56 (Pubitemid 128430860)
124. L. Khomenkova, C. Dufour, P.E. Coulon, C. Bonafos, and F. Gourbilleau High-k Hf-based layers grown by RF magnetron sputtering Nanotechnology 21 2010 095704
125. 2 interface with X-ray photoelectron spectroscopy Appl Phys Express 3 2010 061501
126. 2 and HfSiO dielectrics prepared by radio frequency magnetron sputtering Vacuum 83 2009 902 905
127. 2 binary oxides deposited by chemical solution deposition J Appl Phys 90 2001 1801 1808 (Pubitemid 33611839)
128. 1-x thin films Chem Vap Depos 16 2010 185 190
129. 2/p-Si interfaces at cryogenic temperatures Microelectron Reliab 47 2007 726 728 (Pubitemid 46602436)
130. 2 Inorg Chem 45 2006 11008 11018
131. 2 films on (1 0 0)Si using X-ray photoelectron spectroscopy J Phys D: Appl Phys 42 2009 035308
132. 2 thin films by ALD using novel precursors J Cryst Growth 312 2010 245 249
133. 0.2/Si substrates ECS Trans 16 2008 51 58
134. X.F. Wang, Q. Li, P.F. Lee, J.Y. Dai, and X.G. Gong Characterization of the interface between the Hf-based high-k thin film and the Si using spatially resolved electron energy-loss spectroscopy Micron 41 2010 15 19
135. Y.L. Li, and Q.X. Xu Wet etching characteristics of a HfSiON high-k dielectric in HF-based solutions J Semicond 31 2010 036001
136. 1 - x on (1 0 0) Si Appl Phys Lett 81 2002 376 378
137. y gate dielectric films Mater Sci Semicon Proc 9 2006 870 875 (Pubitemid 46073836)
138. y gate dielectrics using a hafnium oxide as target Appl Surf Sci 252 2006 8673 8676 (Pubitemid 44442536)
139. 2: crystalline structures and equations of state Phys Rev B 59 1999 8467 8472
140. 2 structural phases Phys Rev B 60 1999 14485 14488
141. 2 thin films Thin Soild Films 340 1999 110 116
142. FB) modulation using in situ Ti and Hf interposed in a metal/high-k gate stack J Appl Phys 108 2010 064107
143. 2 film J Semicond 30 2009 082004
144. y gate dielectrics prepared by reactive sputtering Appl Phys Lett 84 2004 1588 1590
145. 2 gate dielectrics in TaN gated nMOSCAP and nMOSFET devices J Vac Sci Technol B 22 2004 1755 1758
146. G. He, L.D. Zhang, G.W. Meng, G.H. Li, Q. Fang, and J.P. Zhang Temperature dependent structural stability and optical properties of ultrathin Hf-Al-O films grown by facing-target reactive sputtering J Appl Phys 102 2007 094103
147. J.A. Taylor Further examination of the Si KLL auger line in silicon nitride thin films Appl Surf Sci 7 1981 168 184
148. C.H. Lu, Y.S. Lai, and J.S. Chen A simple approach to reduce interfacial formation of sputtered Hf-based gate dielectrics by nitrogen incorporation ECS Trans 1 2006 425 430
149. G.D. Wilk, R.M. Wallace, and J.M. Anthony Hafnium and zirconium silicates for advanced gate dielectrics J Appl Phys 87 2000 484 492
150. A. Callegari, E. Cartier, M. Gribelyuk, H.F. Okorn-Schmidt, and T. Zabel Physical and electrical characterization of Hafnium oxide and Hafnium silicate sputtered films J Appl Phys 90 2001 6466 6475
151. G. Pant, P. Punchaipetch, M.J. Kim, M. Wallace R, and B.E. Gnade Low temperature UV/ozone oxidation formation of HfSiON gate dielectric Thin Solid Films 460 2004 242 246
152. P. Punchaipetch, G. Pant, M. Quevedo-Lopez, H. Zhang, M. El-Bouanani, and M.J. Kim Hafnium silicate formation by ultra-violetyozone oxidation of hafnium silicide Thin Solid Films 425 2003 68 71
153. G.B. Xu, and Q.X. Xu Characteristics of high-quality HfSiON gate dielectric prepared by physical vapour deposition Chin Phys B 18 2009 768 772
154. M. Koyama, Y. Kamimuta, M. Koike, M. Suzuki, and A. Nishiyam Effect of film composition of nitrogen incorporated hafnium aluminate (HfAlON) gate dielectric on structural transformation and electrical properties through high-temperature annealing Jpn J Appl Phys 43 2004 1788 1794
155. J.P. Xu, F. Ji, C.X. Li, P.T. Lai, J.G. Guan, and Y.R. Liu Improved electrical properties of metal-oxide-semiconductor capacitor with HfTiON gate dielectric by using HfSiON interlayer Appl Phys Lett 91 2007 152905
156. Y. Kamimuta, M. Koike, T. Ino, M. Suzuki, M. Koyama, and Y. Tsunashima Determination of band alignment of hafnium silicon oxynitride/silicon (HfSiON/Si) structures using electron spectroscopy Jpn J Appl Phys 44 2005 1301 1305 (Pubitemid 40749742)
157. Q.X. Xu, G.B. Xu, W.W. Wang, D.P. Chen, S.L. Shi, and Z.S. Han Study on characteristics of thermally stable HfLaON gate dielectric with TaN metal gate Appl Phys Lett 93 2008 252903
158. G.B. Xu, and Q.X. Xu Thermal stability of HfTaON films prepared by physical vapor deposition J Semicond 30 2009 032002
159. 3 high-k dielectric layers on TiN for memory capacitor applications Appl Phys Lett 92 2008 062906
160. 3 layers on TiN Appl Phys Lett 93 2008 252907
161. L.P. Feng, and Z.T. Liu Structural and electrical properties of thin SrHfON films for high-k gate dielectric Appl Phys Lett 94 2009 252907
162. 2 high-k gate dielectric thin films by RF sputtering J Phys: Conf Ser 152 2009 012005
163. y films Thin Solid Films 468 2004 48 56
164. R. Asahi, T. Morikawa, T. Ohwaki, K. Aoki, and Y. Taga Visible- light photocatalysis in nitrogen-doped titanium oxides Science 293 2001 269 271 (Pubitemid 32694736)
165. G. Shang, P.W. Peacock, and J. Robertson Stability and band offsets of nitrogenated high-dielectric-constant gate oxides Appl Phys Lett 84 2004 106 108
166. P. Kroll Hafnium nitride with thorium phosphide structure: physical properties and an assessment of the Hf-N, Zr-N, and Ti-N phase diagrams at high pressures and temperatures Phys Rev Lett 90 2003 125501
167. S.G. Lim, S. Kriventsov, T.N. Jackson, J.H. Haeni, D.G. Schlom, and A.M. Balbashov Dielectric functions and optical bandgaps of high-K dielectrics for metal-oxide-semiconductor field-effect transistors by far ultraviolet spectroscopic ellipsometry J Appl Phys 91 2002 4500 4505
168. y films Appl Phys Lett 88 2006 192904
169. X.J. Wang, L.D. Zhang, M. Liu, J.P. Zhang, and G. He The effect of nitrogen concentration on the band gap Appl Phys Lett 92 2008 122901
170. y gate dielectrics J Appl Phys 105 2009 014109
171. G.M. Rignanese, F. Detraux, X. Gonze, A. Bongiorno, and A. Pasquarello Dielectric constants of Zr silicates: a first-principles study Phys Rev Lett 89 2002 117601
172. V. Fiorentini, and G. Gulleri Theoretical evaluation of zirconia and hafnia as gate oxides for Si microelectronics Phys Rev Lett 89 2002 266101
173. M. Koike, T. Ino, Y. Kamimuta, M. Koyama, Y. Kamata, and M. Suzuki Dielectric properties of noncrystalline HfSiON Phys Rev B 73 2006 125123
174. 3films on p-Si(1 0 0) Surf Interface Anal 38 2006 502 505
175. 2 Gate dielectrics deposited via tetrakis diethylamido hafnium J Electrochem Soc 150 2003 F67 F74
176. K. Kukli, K. Forsgren, J. Aarik, T. Uustare, A. Aidla, and A. Niskanen Atomic layer deposition of zirconium oxide from zirconium tetraiodide, water and hydrogen peroxide J Cryst Growth 231 2001 262 272 (Pubitemid 32698461)
177. 2 thin films grown by chloride-based atomic layer deposition Appl Surf Sci 253 2006 606 617 (Pubitemid 44894183)
178. 2 film and silicon substrate J Cryst Growth 273 2005 510 514
179. A.J. Craven, M. MacKenzie, D.W. McComb, and F.T. Docherty Investigating physical and chemical changes in high-k gate stacks using nanoanalytical electron microscopy Microelectron Eng 80 2005 90 97 (Pubitemid 40753055)
180. J.H. Harding Short-circuit diffusion in ceramics Interface Sci 11 2003 81 90
181. 2 films Phys Status Solidi (b) 233 2002 18 23
182. y Appl Phys Lett 81 2002 1074 1076
183. z films Appl Phys Lett 81 2002 1609 1611
184. 2 gate dielectrics for future generation of CMOS device application Chin J Semicond 25 2004 1193 1204 (Pubitemid 40109092)
185. 2 nanocrystal nonvolatile flash memory IEEE Trans Electron Dev 53 2006 782 789
186. G. He, L.D. Zhang, G.W. Meng, G.H. Li, Q. Fang, and J.P. Zhang Temperature-dependent structural stability and optical properties of ultrathin Hf-Al-O films grown by facing-target reactive sputtering J Appl Phys 102 2007 094103
187. G. Pant, A. Gnade, M.J. Kim, R.M. Wallace, B.E. Gnade, and M.A. Quevedo-Lopez Comparison of electrical and chemical characteristics of ultrathin HfON versus HfSiON dielectrics Appl Phys Lett 89 2006 032904
188. 2O oxidant Appl Phys Lett 83 2003 5503 5505
189. 2)1 - x dielectric films on Si(1 0 0) Appl Phys Lett 89 2006 122901
190. z films using the Cody-Lorentz parameterized model Appl Phys Lett 85 2004 1701 1703
191. N. Ikarashi, M. Miyamura, K. Masuzaki, and T. Tatsumi Electron energy-loss spectroscopy analysis of the electronic structure of nitrided Hf silicate films Appl Phys Lett 84 2004 3672 3674
192. ygate dielectrics Jpn J Appl Phys 43 2004 7815 7820 (Pubitemid 40169144)
193. N.V. Nguyen, S. Sayan, I. Levin, J.R. Ehrstein, I.J.R. Baumvol, and C. Driemeier Optical band gaps and composition dependence of hafnium-aluminate thin films grown by atomic layer chemical vapor deposition J Vac Sci Technol A 23 2005 1706 1713 (Pubitemid 43119407)
194. T.M. Pan, C.L. Chen, W.W. Yeh, and W.J. Lai Physical and electrical properties of lanthanum oxide dielectrics with Al and Al/TaN metal gates Electrochem Solid-State Lett 10 2007 H101 H103
195. A. Fissel, M. Czernohorsky, and H.J. Osten Characterization of crystalline rare-earth oxide high-k dielectrics grown by molecular beam epitaxy on silicon carbide J Vac Sci Technol B 24 2006 2115 2118 (Pubitemid 44140835)
196. T.M. Pan, J.D. Lee, and W.W. Yeh Influence of oxygen content on the structural and electrical characteristics of thin neodymium oxide gate dielectrics J Appl Phys 101 2007 024110
197. S. Duenas, H. Castan, H. Garcia, A. Gomez, L. Bailon, and K. Kukli Electrical properties of atomic-layer-deposited thin gadolinium oxide high-k gate dielectrics J Electrochem Soc 154 2007 G207 G214
198. 3 films prepared by ion beam assistant electron-beam evaporation J Non-Cryst Solids 355 2009 33 37
199. 3/Si(0 0 1) heterostructures grown by molecular beam epitaxy using a high temperature effusion source Semicond Sci Technol 21 2006 1552 1556 (Pubitemid 46222400)
200. A.C. Jones, H.C. Aspinall, P.R. Chalker, R.J. Potter, K. Kukli, and A. Rahtu Recent developments in the MOCVD and ALD of rare earth oxides and silicates Mater Sci Eng B 118 2005 97 114
201. M. LeskelÄa, K. Kukli, and M. Ritala Rare-earth oxide thin films for gate dielectrics in microelectronics J Alloys Compd 418 2006 27 34 (Pubitemid 43832098)
202. 3 for Si J Appl Phys 89 2001 3920 3927 (Pubitemid 33732493)
203. 3 gate oxides with Si Appl Phys Lett 79 2001 2447 2449 (Pubitemid 33607351)
204. 2 layers on Si(0 0 1) Appl Phys Lett 79 2001 102 104 (Pubitemid 33599539)
205. y on Si(1 0 0) Appl Phys Lett 92 2008 042905
206. 2 plasma on yttrium oxide and yttrium-oxynitride dielectrics J Vac Sci Technol A 22 2004 445 451
207. G. Adachi, and N. Imanaka The binary rare earth oxides Chem Rev 98 1998 1479 1514 (Pubitemid 128635961)
208. 3 high-k thin films Adv Mater 15 2003 1073 1075
209. C. Zhao, T. Witters, B. Brijs, H. Bender, O. Richard, and M. Caymax Ternary rare-earth metal oxide high-k layers on silicon oxide Appl Phys Lett 86 2005 132903
210. H.J. Osten, J.P. Liu, E. Bugiel, H.J. Mussig, and P. Zaumseil Epitaxial growth of praseodymium oxide on silicon Mater Sci Eng B 87 2001 297 302 (Pubitemid 32998006)
211. H.J. Osten, A. Laha, M. Czernohorsky, E. Bugiel, R. Dargis, and A. Fissel Introducing crystalline rare-earth oxides into Si technologies Phys Status Solidi (a) 205 2008 695 707
212. A. Laha, A. Fissel, E. Bugiel, and H.J. Osten Epitaxial multi-component rare earth oxide for high-k application Thin Solid Films 515 2005 6512 6517
213. D.G. Schlom, and J.H. Haeni A thermodynamic approach to selecting alternative gate dielectrics MRS Bull 27 2002 198 203
214. 3/(Ba, Sr)O stacks epitaxially grown on Si Appl Phys Lett 88 2006 072913
215. 3 on (Ba, Sr)O/Si(1 0 0): the relationship between oxygen stoichiometry and interface stability J Appl Phys 99 2006 084102
216. C.J. Forst, C.R. Ashman, K. Schwarz, and P.E. Bloch The interface between silicon and a high-k oxide Nature 427 2004 53 56 (Pubitemid 38094817)
217. R. Droopad, Z. Yu, J. Ramdani, L. Hilt, J.A. Curless, and C.D. Overgaard Development of high dielectric constant epitaxial oxides on silicon by molecular beam epitaxy Mater Sci Eng B 87 2001 292 296 (Pubitemid 32998005)
218. 3/Si(0 0 1) heterojunctions Appl Phys Lett 77 2000 1662 1664
219. X. Zhang, A.A. Demkov, H. Li, X. Hu, Y. Wei, and J. Kulik Phys Rev B 68 2003 125323
220. H. Li, X. Hu, Y. Wei, Z. Yu, X. Zhang, and R. Droopad Two-dimensional growth of high-quality strontium titanate thin films on Si J Appl Phys 93 2003 4521 4525
221. R. Liu, S. Zollner, P. Fejes, R. Gregory, S. Lu, and K. Reid Gate stack and silicide issues in silicon processing II Mater Res Soc Symp Proc 670 2001 K1.1
222. 3 and silicon Appl Phys Lett 84 2004 726 728
223. X.B. Lu, Z.G. Liu, X. Zhang, R. Huang, H.W. Zhou, and X.P. Wang J Phys D: Appl Phys 36 2003 3047 3050
224. 3/Si(1 0 0) films with high-k, low-leakage current and good thermal stability Chin Phys Lett 22 2005 182 184
225. 3 and (0 0 1) silicon Jpn J Appl Phys 44 2005 L617 L619
226. X.H. Zhu, J.M. Zhu, A.D. Li, Z.G. Liu, and N.B. Ming Challenges in atomic-scale characterization of high-k dielectrics and metal gate electrodes for advanced CMOS gate stacks J Mater Sci Technol 25 2009 289 313
227. E. Josse, and T. Skotnicki Polysilicon gate with depletion- or metallic-gate with buried channel: what evil worse? IEEE IEDM Tech Dig 1999 661 664 (Pubitemid 30574553)
228. C. Hobbs, L. Fonseca, V. Dhandapani, S. Samavedam, B. Taylor, and J. Grant Fermi level pinning at the PolySi/metal oxide interface IEEE Symp VLSI Tech Dig 2003 9 10
229. F. Gámiz, A. Godoy, J.B. Roldán, J.E. Carceller, and P. Cartujo Effect of polysilicon depletion charge on electron mobility in ultrathin oxide MOSFETs Semicon Sci Technol 18 2003 927 937
230. M.V. Fischetti, D.A. Neumayer, and E.A. Cartier Effective electron mobility in Si inversion layers in metal-oxide-semiconductor systems with a high-k insulator: the role of remote phonon scattering J Appl Phys 90 2001 4587 4588
231. 2/TiN gate stack IEEE IEDM Tech Dig 2003 653 656
232. E.P. Gusev, D.A. Buchanan, E. Cartier, A. Kumar, D. Dimaria, and S. Guha Ultrathin high-k gate stacks for advanced CMOS devices IEEE IEDM Tech Dig 2001 451 454 (Pubitemid 34170689)
233. C.H. Choi, P.R. Chidambaram, R. Khamankar, C.F. Machala, Z. Yu, and R.W. Dutton Gate length dependent polysilicon depletion effects IEEE Electron Dev Lett 23 2002 224 226 (Pubitemid 34504510)
234. N.D. Arora, R. Rios, and C.L. Huang Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance IEEE Trans Electron Dev 42 1995 935 943
235. R. Rios, N.D. Arora, and C.L. Huang An analytic polysilicon depletion effect model for MOSFET's IEEE Electron Dev Lett 15 1994 129 131
236. 2 gate dielectrics Appl Phys Lett 81 2002 1288 1290
237. A. Shima, T. Mine, and K. Torii Novel laser annealing process for advanced complementary metal-oxide-semiconductor devices with suppressed polycrystalline silicon gate depletion and ultra shallow junctions Jpn J Appl Phys 46 2007 1841 1847 (Pubitemid 47256681)
238. H.Y. Wong, H. Takeuchi, T.-J. King, M. Ameen, and A. Agarwal Elimination of poly-Si gate depletion for sub-65-nm CMOS technologies by eexcimer laser annealing IEEE Electron Dev Lett 26 2005 234 246
239. Wong HY, Takeuchi H, King T-J, Ameen M, Agarwal A. Reduced poly-Si gate depletion effect by pulsed excimer laser annealing. Proc Adv Short-Time Thermal Process Si-Based CMOS Devices II 2004;205-15.
240. 2/SiON high-k stack dielectrics with high thermal stability (1050 °C) IEEE IEDM Tech Dig 2001 861 864
241. S. Pidin, Y. Morisaki, Y. Sugita, T. Aoyama, K. Irino, and T. Nakamura Low standby power CMOS with HfO2 gate oxide for 100-nm generation IEEE Symp VLSI Tech Dig 2002 28 29
242. y) IEEE Symp VLSI Tech Dig 2002 146 147
243. M. Koyama, A. Kaneko, T. Ino, M. Koike, Y. Kamata, and R. Iijima Effects of nitroge in HfSiON gate dielectric on the electrical and thermal characteristics IEEE IEDM Tech Dig 2002 849 852
244. K. Shiraishi, K. Yamada, K. Torii, Y. Akasaka, K. Nakajima, and M. Konno Oxygen-vacancy-induced threshold voltage shifts in Hf-related high-k gate stacks Thin Solid Films 508 2006 305 310
245. 2: polycrystalline silicon gate electrode interfaces Appl Phys Lett 86 2005 012904
246. Y. Akasaka, G. Nakamura, K. Shiraishi, N. Umezawa, K. Yamabe, and O. Ogawa Modified oxygen vacancy induced fermi level pinning model extendable to P-metal pinning Jpn J Appl Phys 45 2006 L1289 L1292
247. E.P. Gusev, V. Narayanan, and M.M. Frank Advanced high-k dielectric stacks with poly-Si and metal gates: recent progress and current challenges IBM Res Dev 50 2006 387 410 (Pubitemid 44375469)
248. M. Koyama, Y. Kamimuta, T. Ino, A. Kaneko, S. Inumiya, and K. Eguchi Careful examination on the asymmetric Vfb shift problem for poly-Si/HfSiON gate stack and its solution by the Hf concentration control in the dielectric near the poly-Si interface with small EOT expense IEEE IEDM Tech Dig 2004 499 502 (Pubitemid 40928338)
249. 2-rich noncrystalline Zr and Hf silicate alloys Appl Phys Lett 77 2000 2912 2914
250. M. Miyamara, K. Masuzaki, H. Watanabe, N. Ikarashi, and T. Tatsumi Origin of flatband voltage shift in poly-Si/Hf-based high-k gate dielectrics and flatband voltage dependence on gate stack structure Jpn J Appl Phys 43 2004 7843 7847 (Pubitemid 40169149)
251. K.L. Lee, M.M. Frank, V. Paruchuri, E. Cartier, B. Linder, and N. Bojarezuk Poly-Si/AlN/HfSiO stack for ideal threshold voltage and mobility in sub-100 nm MOSFETs IEEE Symp VLSI Tech Dig 2006 160 161 (Pubitemid 351424175)
252. 3 capping layer on PMOS IEEE Electron Dev Lett 26 2005 441 444 (Pubitemid 41046717)
253. X. Yu, C. Zhu, and M. Yu Effective suppression of Fermi level pinning in polycrystalline-silicon/high-k gate stack by using polycrystalline-silicon- germanium gate electrode Appl Phys Lett 89 2006 163508
254. Shah, and R.D. Souza Univ MMDM, leicester. Impact of a nonideal metal gate on surface optical phonon-limited mobility in high-k gated MOSFETs IEEE Trans Electron Dev 54 2007 2991 2997 (Pubitemid 350123883)
255. x as alternative gate materials for sub-0.1-μm gate-length PMOS devices Proc SPIE 3506 1998 49 55
256. B. Cheng, M. Cao, R. Rao, A. Inani, P.V. Voorde, and W.M. Greene The impact of high-k gate dielectrics and metal gate electrodes on sub-100 nm MOSFET's IEEE Trans Electron Dev 46 1999 1537 1544
257. H.B. Michaelson The work function of the elements and its periodicity J Appl Phys 48 1977 4729 4733
258. 2 Appl Phys Lett 78 2001 4166 4168 (Pubitemid 33599452)
259. X.P. Wang, H.Y. Yu, M.-F. Li, C.X. Zhu, S. Biesemans, and A. Chin IEEE Electron Dev Lett 28 2007 258 260
260. 2/Si interface Appl Phys Lett 90 2007 172906
261. Y. Kamimuta, K. Iwamoto, Y. Nunoshige, A. Hirano, W. Mizubayashi, and Y. Watanabe Comprehensive study of VFB shift in high-k CMOS-dipole formation, Fermi-level pinning and oxygen vacancy effect IEEE IEDM Tech Dig 2007 341 344
262. K. Tatsumura, M. Goto, S. Kawanaka, K. Nakajima, T. Schimizu, and T. Ishihara Clarification of additional mobility components associated with TaC and TiN metal gates in scaled HfSiON MOSFETs down to sub-0.1 nm EOT IEEE IEDM Tech Dig 2007 349 352
263. S.Y. Tan Dopant enhanced in nickel silicide formation for high-k dielectric applications J Mater Sci - Mater Electron 21 2010 1195 1201
264. C.S. Liu, G. Boccardi, H.Y. Wang, C.T. Lin, J. Petry, and M. Muller 22 nm CMOS approaches by PVD TiN or Ti-silicide as metal gate Int Symp VLSI - TSA 2009 63 64
265. 12) on HfSiON IEEE Electron Dev Lett 27 2006 966 968 (Pubitemid 46415847)
266. x on its thermal stability and electrical property as a gate electrode J Electrochem Soc 153 2006 G572 G577
267. M. Rodrigues, J.A. Martino, A. Mercha, N. Collaert, E. Simoen, and C. Claeys Low-frequency noise and static analysis of the impact of the TiN metal gate thicknesses on n- and p-channel MuGFETs Solid-State Electron 54 2010 1592 1597
268. 2 gate dielectrics J Alloy Compd 487 2009 687 692
269. y gate electrodes for dual gate Si-CMOS devices IEEE Symp VLSI Tech Dig 2001 47 48 (Pubitemid 32950654)
270. R. Lin, Q. Lu, P. Ranade, T.-J. King, and C. HU An adjustable work function technology using Mo gate for CMOS devices IEEE Electron Dev Lett 23 2002 49 51 (Pubitemid 34138841)
271. S.-N. Hong, and J.-M. Park Investigation of the Ru-Zr metal alloy for use as a gate electrode in NMOS devices J Korean Phys Soc 56 2010 1497 1499
272. T.-L. Li, C.-H. Hu, W.-L. Ho, H.C.-H. Wang, and C.-Y. Chang Continuous and precise work function adjustment for integratable dual metal gate CMOS technology using Hf-Mo binary alloys IEEE Trans Electron Dev 52 2005 1172 1179 (Pubitemid 40871153)
273. zmetals as gate electrodes for p-metal oxide semiconductor field effect transistor devices J Appl Phys 104 2008 084101
274. D.S. Yu, A. Chin, C.C. Laio, C.F. Lee, C.F. Cheng, and W.J. Chen 3D GOI CMOSFETs with Novel IrO2(Hf) dual gates and high-k dielectric on 1P6M-0.18 μm-CMOS IEEE IEDM Tech Dig 2004 181 184 (Pubitemid 40928257)
275. M. Kadoshima, T. Aminaka, E. Kurosawa, T. Aoyama, Y. Nara, and Y. Ohji Thermally unstable ruthenium oxide gate electrodes in metal/high-k gate stacks Jpn J Appl Phys 47 2008 2108 2111
276. C. Ren, D.S.H. Chan, X.P. Wang, B.B. Faizhal, M.-F. Li, and Y.-C. Yeo Physical and electrical properties of lanthanide-incorporated tantalum nitride for n-channel metal-oxide-semiconductor field-effect transistors Appl Phys Lett 87 2005 073506
277. ymetal gates Appl Phys Lett 88 2006 072108
278. X.P. Wang, A.E.-J. Lim, H.Y. Yu, M.-F. Li, C. Ren, and W.-Y. Loh Nitrides by lanthanum or aluminum doping for advanced CMOS devices IEEE Trans Electron Dev 54 2007 2871 2877
279. H. Fukutome, K. Okubo, S. Akiyama, N. Idani, H. Ohta, and K. Kawamura Sub-30-nm complementary metal-oxide-semiconductor field-effect transistor with Pt-incorporated fully Ni-silicide/SiON gate stack Jpn J Appl Phys 49 2010 04DC16
280. Y.H. Kim, C. Cabral, E.P. Gusev, R. Carruthers, L. Gignac, and M. Gribelyuk Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks IEEE IEDM Tech Dig 2005 642 645 (Pubitemid 46370933)
281. J. Liu, and D.L. Kwong Phase formation and work function tuning in fully silicided Co-Ni metal gates with rariable Co-Ni ratios Appl Phys Lett 88 2006 052109
282. H.N. Alshareef, M. Quevedo-Lopez, H.C. Wen, R. Harris, P. Kirsch, and P. Majhi Work function engineering using lanthanum oxide interfacial layers Appl Phys Lett 89 2006 232103
283. J.P. Lu, D. Miles, J. Zhao, A. Gurba, Y. Xu, and C. Lin A novel nickel SALICIDE process technology for CMOS devices with sub-40 nm physical gate length IEEE IEDM Tech Dig 2002 371 374
284. W.P. Maszara Fully silicided metal gates for high-performance CMOS technology: a review J Electrochem Soc 152 2005 G550 G555
285. S.P. Murarka Refractory silicides for integrated circuits J Vac Sci Technol 17 1980 775 792
286. 2 thin films Proc 5th Int Conf Solid-State Integrated Circuit Technol 1998 271 274
287. S.-L. Zhang, and M. Östling Metal silicides in CMOS technology: past, present, and future trends Crit Rev Solid Mater Sci 28 2003 1 29
288. S.P. Murarka, D.B. Fraser, A.K. Sinha, and H.J. Levinstein Refractory silicides of titanium and tantalum for low-resistivity gates and interconnects IEEE Trans Electron Dev ED-27 1980 1409 1417 (Pubitemid 11445379)
289. S. Inoue, N. Toyokura, T. Nakamura, and H. Ishikawa Phosphorus-doped molybdenum silicide films for LSI applications J Electrochem Soc 128 1981 2402 2410 (Pubitemid 12448282)
290. J.P. Gambino, and E.G. Colgan Silicides and ohmic contacts Mater Chem Phys 52 1998 46 99
291. x under thermal stress J Appl Phys 92 2002 7193 7199
292. J. Kedzierski, D. Boyd, and C. Cabral Threshold voltage control in NiSi-gated MOSFETs through SIIS IEEE Trans Electron Dev 52 2005 39 46 (Pubitemid 40118909)
293. Y. Tsuchiya, M. Yoshiki, J. Koga, A. Nishiyama, and M. Koyama Influence of Ni silicide phases on effective work function modulation with Al-pileup in the Ni fully silicided gate/HfSiON system J Appl Phys 106 2009 044510
294. K. Hosaka, T. Kurahashi, K. Kawamura, T. Aoyama, Y. Mishima, and K. Suzuki A comprehensive study of fully-silicided gates to achieve wide-range work function differences (0.91 eV) for high-performance CMOS devices IEEE Symp VLSI Tech Dig 2005 66 67 (Pubitemid 43897570)
295. M.A. Pawlak, A. Lauwers, T. Janssens, K.G. Anil, K. Opsomer, and K. Maex Modulation of the workfunction of Ni fully silicided gates by doping: dielectric and silicide phase effects IEEE Electron Dev Lett 27 2006 99 101 (Pubitemid 43159592)
296. 2/Si MOS structure Ext Abst Int Conf Solid State Dev Mater 2003 494 495
297. C.-T. Lin, M. Ramin, M. Pas, R. Wise, Y.-K. Fang, and C.-H. Hsu CMOS dual-work-function engineering by using implanted Ni-FUSI IEEE Electron Dev Lett 28 2007 831 833
298. P. Sivasubramani, T.S. Boscke, J. Huang, C.D. Young, P.D. Kirsch, and S.A. Krishnan Dipole moment model explaining nFET Vt tuning utilizing La, Sc, Er, and Sr doped HfSiON dielectrics IEEE Symp VLSI Tech Dig 2007 68 69
299. 2) polysilicon: a novel approach to very low-resistive gate (∼2Ω/square) without metal CMP nor etching IEEE IEDM Tech Dig 2001 825 828 (Pubitemid 34166843)
300. J.A. Kittl, A. Lauwers, O. Chamirian, M.V. Dal, A. Akheyar, and M.D. Potter Ni- and Co-based silicides for advanced CMOS applications Microelectron Eng 70 2003 158 165
301. P. Xuan, and J. Bokor Investigation of NiSi and TiSi as CMOS gate materials IEEE Electron Dev Lett 24 2003 634 636
302. R. Beyers, and R. Sinclair Metastable phase formation in titanium-silicon thin films J Appl Phys 57 1985 5240 5245
303. 2 IEEE Trans Electron Dev 38 1991 262 269
304. 2 IEEE Trans Electron Dev 47 2000 313 317 (Pubitemid 30556150)
305. T. Jarmar, J. Seger, F. Ericson, U. Smith, and S.-L. Zhang Cross-sectional transmission electron microscopy study of the influence of niobium on the formation of titanium silicide in small-feature contacts J Appl Phys 93 2003 4480 4484
306. 2 phase transformation temperature using refractory metal ion implantation Appl Phys Lett 67 1995 3729 3731
307. 2 using titanium alloys Appl Phys Lett 71 1997 3531 3533 (Pubitemid 127613797)
308. A. Mouroux, M. Roux, S.-L. Zhang, F.M. d'Heurle, and C. Cabral Jr Phase formation and resistivity in the ternary system Ti-Nb-Si J Appl Phys 86 1999 2323 2329 (Pubitemid 129562227)
309. S. Zhu, J. Chen, M.-F. Li, S.J. Lee, J. Singh, and C.X. Zhu N-type schottky barrier source/drain MOSFET using ytterbium silicide IEEE Electron Dev Lett 25 2004 565 567
310. S. Zhu, H.Y. Yu, S.J. Wang, J.H. Chen, C. Shen, and C.X. Zhu Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode IEEE Electron Dev Lett 25 2004 268 270
311. M. Jang, J. Oh, S. Maeng, W. Cho, S. Lee, and K. Kang Characteristics of erbium-silicided n-type Schottky barrier tunnel transistors Appl Phys Lett 83 2003 2611 2613
312. C.H. Wu, B.F. Huang, A. Chin, S.J. Wang, X.P. Wang, and M.-F. Li High-temperature stable HfLaON p-MOSFETs with high-work-function Ir3Si gate IEEE Electron Dev Lett 28 2007 292 294
313. C.H. Wu, B.F. Huang, A. Chin, S.J. Wang, F.Y. Yen, and Y.T. Hou HfSiON n-MOSFETs using low-work function HfSix gate IEEE Electron Dev Lett 27 2006 762 764 (Pubitemid 44355899)
314. C.H. Wu, B.F. Huang, A. Chin, S.J. Wang, F.Y. Yen, and Y.T. Hou HfAlON n-MOSFETs incorporating low-work function gate using ytterbium silicide IEEE Electron Dev Lett 27 2006 454 456 (Pubitemid 43821736)
315. x J Appl Phys 96 2004 1919 1928
316. H.D.B. Gottlob, M.C. Lemme, M. Schmidt, T.J. Echtermeyer, T. Mollenhauer, and H. Kurz Gentle FUSI NiSi metal gate process for high-k dielectric screening Microelectron Eng 85 2008 2019 2021
317. D. Mangelinck, J.Y. Dai, J.S. Pan, and S.K. Lahiri Enhancement of thermal stability of NiSi films on (1 0 0)Si and (1 1 1)Si by Pt addition Appl Phys Lett 75 1999 1736 1738 (Pubitemid 129304480)
318. A.S.W. Wong, D.Z. Chi, M. Loomans, D. Ma, M.Y. Lai, and W.C. Tjiu F-enhanced morphological and thermal stability of NiSi films on BF 2 + -implanted Si(001) Appl Phys Lett 81 2002 5138 5140
319. H.Y. Yu, R. Singanamalla, K. Opsomer, E. Augendre, E. Simoen, and J.A. Kittl Demonstration of Ni fully germanosilicide as a pFET gate electrode candidate on HfSiON IEEE IEDM Tech Dig 2005 638 641 (Pubitemid 46370932)
320. J. Liu, H.C. Wen, J.P. Lu, and D.-L. Kwong Dual-work-function metal gates by full silicidation of poly-Si with Co-Ni Bi-layers IEEE Electron Dev Lett 26 2005 228 230 (Pubitemid 40573218)
321. Lander RJP, Hooker JC, Zijl JPV, Roozeboom F, Maas MPM, Tamminga Y, et al. A tuneable metal gate work function using solid state diffusion of nitrogen. In: Proc ESSDERC, Firenze, Italy; 2002. p. 103-06.
322. H. Wakabayashi, Y. Saito, K. Takeuchi, T. Mogami, and T. Kunio A dual-metal gate CMOS technology using nitrogen-concentration-controlled TiNx film IEEE Trans Electron Dev 48 2001 2363 2369 (Pubitemid 33018203)
323. 3 Microelectron Eng 82 2005 248 253 (Pubitemid 41690452)
324. y for dual metal gate electrodes Appl Phys Lett 81 2002 4192 4194
325. L.E. Toth Transition metal carbides and nitrides 1971 Academic Press New York [chapter 6, p. 188]
326. H.Y. Yu, M.-F. Li, and D.-L. Kwong Thermally robutst HfN metal as a promising gate electrode for advanced MOS device applications IEEE Trans Electron Dev 51 2004 609 615
327. 2 gate stack for advanced MOS device applications IEEE Electron Dev Lett 25 2004 70 72
328. H.Y. Yu, H.F. Lim, J.H. Chen, M.F. Li, C. Zhu, and C.H. Tung Physical and electrical characteristics of HfN gate electrode for advanced MOS devices IEEE Electron Dev Lett 24 2003 230 232
329. 3 on the fabrication of HfN as gate-electrode using MOCVD Thin Solid Films 498 2006 75 79 (Pubitemid 43113128)
330. B.H. Lee, R. Choi, L. Kang, S. Gopalan, R. Nieh, and K. Onishi Charactristics of TaN gate MOSFET with ultrathin hafnium oxide(8 -12 ) IEEE IEDM Tech Dig 2000 39 42
331. x gate electrodes Microelectron Eng 75 2004 389 396
332. R. Jha, B. Lee, B. Chen, S. Novak, P. Majhi, and V. Misra Dependence of PMOS metal-metal work functions on surface conditions of high-k gate dielectrics IEEE IEDM Tech Dig 2005 43 46 (Pubitemid 46370787)
333. 2 Jpn J Appl Phys 45 2006 L83 L85
334. 5 gate structure using effective diffusion barrier of denuded tungsten nitride Jpn J Appl Phys 40 2001 4854 4861 (Pubitemid 32991287)
335. H. Shimada, I. Ohshima, S.-I. Nakao, M. Nakagawa, K. Kanemoto, and M. Hirayama Low resistivity bcc-Ta/TaNx metal gate MNSFETs having plane gate structure featuring fully low-temperature processing below 450 °C IEEE Symp VLSI Tech Dig 2001 67 68 (Pubitemid 32950663)
336. R. Jha, J. Lee, P. Majhi, and V. Misra Investigation of work function tuning using multiple layer metal gate electrodes stacks for complementary metal-oxide-semiconductor applications Appl Phys Lett 87 2005 223503
337. W.P. Bai, S.H. Bae, H.C. Wen, S. Mathew, L.K. Bera, and N. Balasubramanian Three-layer laminated metal gate electrodes with tunable work functions for CMOS applications IEEE Electron Dev Lett 26 2005 231 233 (Pubitemid 40555658)
338. M. Hasan, H. Park, H. Yang, H. Hwang, H.-S. Jung, and H.-H. Lee Ultralow work function of scandium metal gate with tantalum nitride interface layer for n-channel metal oxide semiconductor application Appl Phys Lett 90 2007 103510
339. C. Ren, B.B. Faizhal, D.S.H. Chan, M.-F. Li, Y.-C. Yeo, and A.D. Trigg Work function tuning of metal nitride electrodes for advanced CMOS devices Thin Solid Films 504 2006 174 177
340. D.-G. Park, T.-H. Cha, K.-Y. Lim, H.-J. Cho, T.-K. Kim, and S.-A. Jang Robust ternary metal gate electrodes for dual gate CMOS devices IEEE Int Electron Dev Meet Tech Dig 2001 671 674 (Pubitemid 34166813)
341. H. Luan, H.N. Alshareef, H.R. Harris, H.C. When, K. Choi, and Y. Senzaki Evaluation of titanium silicon nitride as gate electrodes for complementary metal-oxide-semiconductor Appl Phys Lett 88 2006 142113
342. J.H. Lee, Y.-S. Suh, H. Lazar, R. Jha, J. Gurganus, and Y. Lin Compatibility of dual metal gate electrodes with high-k dielectrics for CMOS IEEE IEDM Tech Dig 2003 323 326
343. B. Chen, N. Biawas, and Veena Misra Electrical and physical analysis of MoTa alloy for gate electrode applications J Electrochem Soc 153 2006 G417 G419
344. 2 gate dielectric J Korean Phys Soc 53 2008 709 712
345. R.M. Todi, A.P. Warren, K.B. Sundaram, K. Barmak, and K.R. Coffey Characterization of Pt-Ru binary alloy thin films for work function tuning IEEE Electron Dev Lett 27 2006 542 544
346. C.D. Gelatt, and H. Ehrenreich Jr. Charge transfer in alloys: AgAu Phys Rev B 10 1974 398 415
347. B. Chen, Y. Suh, J. Lee, J. Gurganus, V. Misra, and C. Cabral Physical and electrical analysis of RuxYy alloys for gate electrode applications Appl Phys Lett 86 2005 053502
348. 1-xalloy gate electrode Microelectron Eng 85 2008 1524 1528
349. I. Polishchuk, P. Ranade, T.-J. King, and C. Hu Dual work function metal gate CMOS technology using metal interdiffusion IEEE Electron Dev Lett 22 2001 444 446 (Pubitemid 32863875)
350. H. Zhong, S.-N. Hong, Y.-S. Suh, H. Lazar, G. Heuss, and V. Misra Properties of Ru-Ta alloys as gate electrodes for NMOS and PMOS silicon devices IEEE IDM Tech Dig 2001 467 470 (Pubitemid 34166769)
351. T. Matsukawa, Y.X. Liu, M. Masahara, K. Ishii, K. Endo, and H. Yamauchi Work function controolability of metal gates made by interdiffusing metal stacks with low and high work functions Microelectron Eng 80 2005 284 287 (Pubitemid 40753096)
352. W. Schottky Abweichungen von Ohm'schen gesetz in halbleitern Phys Z 41 1940 570 573
353. x/n-Si gate stack Appl Phys Lett 88 2006 072907
354. M. Kadoshima, Y. Sugita, K. Shiraishi, H. Watanabe, A. Ohta, and S. Miyazaki Fermi-level pinning position modulation by Al-containing metal gate for cost-effective dual-metal/dual-high-k CMOS IEEE Symp VLSI Tech Dig 2007 66 67
355. B. Chen, R. Jha, and V. Misra Work function tuning via interface dipole by ultrathin reaction layers using AlTa and AlTaN alloys IEEE Electron Dev Lett 27 2006 731 733 (Pubitemid 44355890)
356. 2/Si capacitors Jpn J Appl Phys 46 2007 7251 7255 (Pubitemid 350074885)
357. x interfacial layers Appl Phys Lett 88 2006 112114
358. Y.-C. Yeo, P. Ranade, T.-J. King, and C. Hu Effects of high-k gate dielectric materials on metal and silicon gate workfunctions IEEE Electron Dev Lett 23 2002 342 344 (Pubitemid 34731964)
359. J. Robertson Band offsets of wide-band-gap oxides and implications for future electronic devices band offsets of wide-band-gap oxides and implications for future electronic devices J Vac Sci Technol B 18 2000 1785 1791
360. J.K. Schaeffer, L.R.C. Fonseca, S.B. Samavedam, Y. Liang, P.J. Tobin, and B.E. White Contributions to the effective work function of platinum on hafnium oxide Appl Phys Lett 85 2004 1826 1828
361. M. Kadoshima, A. Ogawa, H. Ota, K. Iwamoto, M. Takahashi, and N. Mise Symmetrical threshold voltage in complementary metal-oxide-semiconductor field-effect transistors with HfAlOx(N) achieved by adjusting Hf/Al compositional ratio J Appl Phys 99 2006 054506
362. P.D. Kirsch, P. Sivasubramani, J. Huang, C.D. Young, M.A. Quevedop-Lopez, and H.C. Wen Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning Appl Phys Lett 92 2008 092901
363. A.E.-J. Lim, W.-W. Fang, F. Liu, R.T.P. Lee, G. Samudra, and D.-L. Kwong Impact of interfacial dipole on effective work function of nickel fully silicided gate electrodes formed on rare-earth-based dielectric interlayers Appl Phys Lett 91 2007 172115
364. 3 insertion Solid-State Electron 52 2008 1280 1284
365. J.K. Schaeffer, D.C. Gilmer, C. Capasso, S. Kalpat, B. Taylor, and M.V. Raymond Application of group electronegativity concepts to the effective work functions of metal gate electrodes on high-k gate oxides Microelectron Eng 84 2007 2196 2200 (Pubitemid 46777027)
366. 2 interface Appl Phys Lett 94 2009 132902
367. 2 interface Appl Phys Lett 92 2008 132907
368. H.-C. Wen, S.C. Song, C.S. Park, C. Burham, G. Bersuker, and K. Choi Gate first metal-aluminum-nitride PMOS electrodes for 32 nm low standby power applications IEEE Symp VLSI Tech Dig 2007 160 161
369. S.C. Song, C.S. Park, J. Price, C. B urham, R. Choi, and H.C. Wen Mechanism of Vfb roll-off with high work function metal gate and low temperature oxygen incorporation to achieve PMOS band edge work function IEEE IEDM Tech Dig 2007 337 340
370. 3 film deposited on terraced oxide Appl Phys Lett 93 2008 133506
371. FB roll-off IEEE Symp VLSI Tech Dig 2008 80 81
372. N.T. Barrett, O. Renault, P. Besson, Y.L. Tiec, and F. Martin Band offsets of nitrided ultrathin hafnium silicate films Appl Phys Lett 88 2006 162906
373. K. Kakushima, K. Okamoto, K. Tachi, J. Song, S. Sato, and T. Kawanago Observation of band bending of metal/high-k Si capacitor with high energy X-ray photoemission spectroscopy and its application to interface dipole measurement J Appl Phys 104 2008 104908
374. 2/Si interface J Appl Phys 105 2009 024102
375. 2/Si stacks. Ext Abst Int Conf Solid State Dev Mater 2009;40-41.
376. 2 stack structure using by backside X-ray photoelectron spectroscopy Ext Abst Int Conf Solid State Dev Mater 2009 44 45
377. 2 interface: X-ray photoelectron spectroscopy characteristics. Jpn J Appl Phys, in press.
378. 2 high-k insulating barriers: band offset and interfacial dipole characterization Jpn J Appl Phys 47 2008 2410 2414
379. 2/Si MOS structure Ext Abst Int Conf Solid State Dev Mater 2007 1028 1029
380. 2/Si interface Appl Phys Express 3 2010 054101
381. 2/Si interface Ext Abst Int Conf Solid State Dev Mater 2008 682 683
382. Q. Lu, Y.C. Yeo, P. Ranade, H. Takeuchi, T.-J. King, and C. Hu Dual-metal gate technology for deep-submicron CMOS transistors IEEE Symp VLSI Tech Dig 2000 72 73
383. 2 gate dielectric IEEE Symp VLSI Tech Dig 2005 50 51 (Pubitemid 43897564)
384. M.M. Hussain, N. Moumen, N. Zhang, and B.F. Womack Metal wet etch issues and effects in dual metal gate stack integration J Electrochem Soc 153 2006 G389 G393
385. Y.C. Yeo, Q. Lu, P. Ranade, H. Takeuchi, K.J. Yang, and I. Polishchuk Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectric IEEE Electron Dev Lett 22 2001 227 229 (Pubitemid 32486881)
386. 2 gate dielectric IEEE IEDM Tech Dig 2002 433 436
387. C.S. Park, B.J. Cho, and D.-L. Kwong An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer IEEE Electron Dev Lett 24 2003 298 300
388. th adjustment on high-k HfTaON by high-temperature metal intermixing Solid-State Electron 51 2007 1479 1484 (Pubitemid 350138025)
389. I. Polishchuk, P. Ranade, T.-J. King, and C. Hu Dual work function metal gate CMOS transistors by Ni-Ti interdiffusion IEEE Electron Dev Lett 23 2002 200 202 (Pubitemid 34504504)
390. T. Matsukawa, Y. Liu, K. Endo, M. Masahara, Y. Ishikawa, and H. Yamauchi Dual-metal-gate transistors with symmetrical threshold voltages using work-function-tuned Ta/Mo bilayer metal gates Jpn J Appl Phys 47 2008 2428 2432
391. Q. Lu, R. Lin, P. Ranade, T.-J. King, and C. Hu Metal gate work function adjustment for future CMOS technology IEEE Symp VLSI Tech Dig 2001 45 46 (Pubitemid 32950653)
392. H. Wakabayashi, Y. Saito, K. Takeuchi, T. Mogami, and T. Kunio A novel W/TiNx metal gate CMOS technology using nitrogen-concentratin-controlled TiNx film IEEE IEDM Tech Dig 1999 253 256 (Pubitemid 30574459)
393. P. Ranade, Y.-K. Choi, D. Ha, A. Agarwal, M. Ameen, and T.-J. King Tunable work function molybdenum gate technology for FDSOI-CMOS IEEE IEDM Tech Dig 2002 363 366
394. 5 high-k dielectric films Solid State Electron 50 2006 114 118 (Pubitemid 43220399)
395. M. Lundstrom On the mobility versus drain current relation for a nanoscale MOSFET IEEE Electron Dev Lett 22 2001 293 295 (Pubitemid 32584999)
396. Sze SM, NG KK. Physics of semiconductor devices. 2nd ed. New York: Willey; 2007. p. 789.
397. X. Liu, X. Ma, X. Du, W. Liu, Z. Song, and C. Lin Modified postannealing of the Ge condensation process for better-strained Si material and devices J Vac Sci Technol B 28 2010 1020 1025
398. S. Baudot, F. Andrieu, O. Weber, P. Perreau, J. Damlencourt, and S. Barnola Fully depleted strained silicon-on-insulator p-MOSFETs with recessed and embedded silicon-germanium source/drain IEEE Electron Dev Lett 31 2010 1074 1076
399. M.L. Lee, E.A. Fitzgerald, M.T. Bulsara, M.T. Currie, and A. Lochtefeld Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors J Appl Phys 97 2005 011101
400. S. Kimura, D. Hisamoto, and N. Sugii Prospect of Si semiconductor devices in nanometer era Hitachi Rev 54 2005 2 8 (Pubitemid 40224986)
401. K. Rim, R. Anderson, D. Boyd, F. Cardone, K. Chan, and H. Chen Strained Si CMOS (SS CMOS) technology: opportunities and challenges Solid-State Electron 47 2003 1133 1139
402. K. Rim, J. Chu, H. Chen, K.A. Jenkins, T. Kanarsky, and K. Lee Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs IEEE Symp VLSI Tech Dig 2002 98 99
403. S.H. Olsen, A.G. O'Neill, L.S. Driscoll, K.S.K. Kwa, S. Chattopadhyay, and A.M. Waite High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture IEEE Trans Electron Dev 50 2003 1961 1969
404. S.H. Olsen, I. Yan, R. Agaiby, E. Escobedo-Cousin, A.G. O'Neill, and P.-E. Hellström Strained Si/SiGe MOS technology: improving gate dielectric integrity Microelectron Eng 86 2009 218 223
405. B.H. Lee, A. Mocuta, S. Bedell, H. Chen, D. Sadana, and K. Rim Performance enhancement on sub-70 nm strained silicon SOI MOSFETs on ultra-thin thermally mixed strained silicon/SiGe on insulator (TM-SGOI) substrate with raised S/D IEEE IEDM Tech Dig 2002 946 948
406. S. Takagi, M. Takayanagi, and A. Toriumi Impact of electron and hole inversion-layer capacitance on low voltage operation of scaled n- and p-MOSFET's IEEE Trans Electron Dev 47 2000 999 1005
407. A. Toriumi, T. Tabata, C.H. Lee, T. Nishimura, K. Kita, and K. Nagashio Opportunities and challenges for Ge CMOS-control of interfacing filed on Ge is a key Microelectron Eng 86 2009 1571 1576
408. K. Kita, T. Takahashi, H. Nomura, S. Suzuki, T. Nishimura, and A. Toriumi Control of high-k/germanium interface properties through selection of high-k materials and suppression of GeO volatilization Appl Surf Sci 254 2008 6100 6105
409. Y. Kamata High-k/Ge MOSFETs for future nanoelectronics Mater Today 11 2008 30 38 (Pubitemid 350266412)
410. P. Zimmerman, G. Nicholas, B.D. Jaeger, B. Kaczer, A. Stesmans, and L.A. Ragnarsson High performance Ge pMOS devices using a Si-compatible process flow IEEE IEDM Tech Dig 2006 655 658
411. R. Xie, and C. Zhu Effects of sulfur passivation on germanium MOS capacitors with HfON gate dielectric IEEE Electron Dev Lett 28 2007 976 979 (Pubitemid 350111788)
412. K.H. Kim, R.G. Gordon, A. Ritenour, and D.A. Antoniadis Atomic layer deposition of insulating nitride interfacial layers for germanium metal oxide semiconductor field effect transistors with high-k oxide/tungsten nitride gate stacks Appl Phys Lett 90 2007 212104
413. R. Xie, T.H. Phung, W. He, M. Yu, and C. Zhu Interface-engineered high-mobility high-k/Ge pMOSFETs with 1-nm equivalent oxide thickness IEEE Trans Electron Dev 56 2009 1330 1337
414. P.C. McIntyre, Y. Oshima, E. Kim, and K.C. Saraswat Interface studies of ALD-grown metal oxide insulators on Ge and III-V semiconductors Microelectron Eng 86 2009 1536 1539
415. F. Gao, S.J. Lee, J.S. Pan, L.J. Tang, and D.-L. Kwong Surface passivation using ultrathin AlNx film for Ge-metal-oxide-semiconductor devices with hafnium oxide gate dielectric Appl Phys Lett 86 2005 113501
416. 3 as passivating interlayer for enhancing the electrical properties and high-field reliability of n-Ge metal-oxide-semiconductor capacitors with high-k HfTiO gate dielectric Appl Phys Lett 95 2009 022910
417. 2 bilayers on germanium J Appl Phys 102 2007 024104
418. M. Cooke Oxide materials for III-V MOSFET gate stacks Semicond Today 3 2008 56 60
419. S. Datta, T. Ashley, J. Brask, L. Buckle, M. Doczy, and M. Emeny 85 nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications IEEE IEDM Tech Dig 2005 763 766 (Pubitemid 46370962)
420. M. Passlack, J.K. Abrokwah, R. Droopad, Z. Yu, C. Overgaard, and S.I. Yi Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor IEEE Electron Dev Lett 23 2002 508 510 (Pubitemid 35022938)
421. 2 gate dielectric Appl Phys Lett 92 2008 243506
422. 3on the hydroxylated GaAs (0 0 1)-4 × 2 surface J Phys: Condens Matter 17 2005 7517 7522 (Pubitemid 41640725)
423. 2 gate dielectric on GaAs Appl Phys Lett 90 2007 183510
424. 0.8As metal-oxide-semiconductor capacitors Appl Phys Lett 92 2008 172904
425. 3/GaAs interface improved by sulfur passivation J Appl Phys 96 2004 4811 4816
426. 2 and silicon interface passivation layer Appl Phys Lett 92 2008 202903
427. 3 as gate dielectric IEEE Electron Dev Lett 28 2007 935 938 (Pubitemid 350111775)
428. S. Takagi, A. Toriumi, M. Iwase, and H. Tango On the universality of inversion layer mobility in Si MOSFET's: Part I - effects of substrate impurity concentration IEEE Trans Electron Dev 41 1994 2357 2362
429. M. Leong, B. Doris, J. Kedzierski, K. Rim, and M. Yang Silicon device scaling to the sub-10-nm regime Science 306 2004 2057 2060 (Pubitemid 40007650)
430. B.S. Doyle, S. Datta, M. Doczy, S. Hareland, B. Jin, and J. Kavalieros High performance fully-depleted tri-gate CMOS transistors IEEE Electron Dev Lett 24 2003 263 265
431. J. Wang, M.S. Gudiksen, X. Duan, Y. Cui, and C.M. Lieber Highly polarized photoluminescence and photodetection from single indium phosphide nanowires Science 293 2001 1455 1457 (Pubitemid 32801542)
432. A. Javey, H. Kim, M. Brink, Q. Wang, A. Ural, and J. Guo High-k dielectrics for advanced carbon-nanotube transistors and logic gates Nat Mater 1 2002 241 246
433. J. Xiang, W. Lu, Y. Hu, Y. Wu, H. Yan, and C.M. Lieber Ge/Si nanowire heterostructures as high-performance field-effect transistors Nature 441 2006 489 493 (Pubitemid 44050147)
434. A. Javey, S. Nam, R.S. Friedman, H. Yan, and C.M. Lieber Layer-by-layer assembly of nanowires for three-dimensional, multifunctional electronics Nano Lett 7 2007 773 777 (Pubitemid 46516064)
435. C.B. Winkelmann, I. Ionica, X. Chevalier, G. Royal, C. Bucher, and V. Bouchiat Optical switching of porphyrin-coated silicon nanowire field effect transistors Nano Lett 7 2007 1454 1458 (Pubitemid 47140405)
436. 3 nanowire field effect transistors J Appl Phys 102 2007 084508
437. S. Ju, K. Lee, M.-H. Yoon, A. Facchetti, T.J. Mark, and D.B. Janes High performance ZnO nanowire field effect transistors with organic gate nanodielectrics: effects of metal contacts and ozone treatment Nanotechnology 18 2007 155201
438. A. Javey, J. Guo, D.B. Farmer, Q. Wang, D. Wang, and R.G. Gordon Carbon nanotube field-effect transistors with integrated ohmic contacts and high-k gate dielectrics Nano Lett 4 2004 447 450 (Pubitemid 38402631)
439. M. Abe, K. Murata, T. Ataka, and K. Matsumoto Calibration method for a carbon nanotube field-effect transistor biosensor Nanotechnology 19 2008 045505
440. K. Nishiguchi, Y. Ono, A. Fujiwara, H. Yamaguchi, H. Inokawa, and Y. Takahashi Infrared detection with silicon nano-field-effect transistors Appl Phys Lett 90 2007 223108
441. Y.H. Ahn, and J. Park Efficient visible light detection using individual germanium nanowire field effect transistors Appl Phys Lett 91 2007 162102
442. S.E. Thompson, and S. Parthasarathy Moore's law: the future of Si microelectronics Mater Today 9 2006 20 25 (Pubitemid 43783458)