A comprehensive study of fully-silicided gates to achieve wide-range work function differences (0.91 eV) for high-performance CMOS devices

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2005, Issue , 2005, Pages 66-67

  Hosaka, K ^a   Kurahashi, T ^a   Kawamura, K ^a   Aoyama, T ^a   Mishima, Y ^a   Suzuki, K ^a   Sato, S ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; DOPING (ADDITIVES); GATES (TRANSISTOR); NITRIDES; SEGREGATION (METALLOGRAPHY); SURFACES;

DIELECTRIC SURFACES; GATE OXIDE SURFACE IMPACTS;

CMOS INTEGRATED CIRCUITS;

EID: 33745138793     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2005.1469214     Document Type: Conference Paper

References (4)

1. J. Kedzierski et al., IEDM Tech. Dig., p. 247, 2002;
2. W. P. Maszara et al., IEDM Tech. Dig., p. 367, 2002;
3. D. Aimé et al., IEDM Tech. Dig., p. 87, 2004;
4. K. Takahashi et al., IEDM Tech. Dig., p. 91, 2004;