Strained Si CMOS (SS CMOS) technology: Opportunities and challenges

Solid-State Electronics

Volumn 47, Issue 7 SPEC., 2003, Pages 1133-1139

  Rim, K ^a   Anderson, R ^b   Boyd, D ^b   Cardone, F ^a   Chan, K ^a   Chen, H ^b   Christansen, S ^a   Chu, J ^a   Jenkins, K ^a   Kanarsky, T ^b   Koester, S ^a   Lee, B H ^b   Lee, K ^a   Mazzeo, V ^b   Mocuta, A ^b   Mocuta, D ^b   Mooney, P M ^a   Oldiges, P ^b   Ott, J ^a   Ronsheim, P ^b   Roy, R ^a   Steegen, A ^b   Yang, M ^a   Zhu, H ^b   Ieong, M ^b   Wong, H S P ^a   more..

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON MOBILITY; HOLE MOBILITY; LATTICE CONSTANTS; MOSFET DEVICES; SILICON; STRAIN;

STRAIN-INDUCED ENHANCEMENT;

CMOS INTEGRATED CIRCUITS;

EID: 0038417865     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(03)00041-8     Document Type: Conference Paper

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