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Volumn , Issue , 2002, Pages 433-436

Dual-metal gate CMOS with HfO2 gate dielectric

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER MOBILITY; DIELECTRIC MATERIALS; ELECTRIC CHARGE; GATES (TRANSISTOR); HAFNIUM COMPOUNDS; LEAKAGE CURRENTS; SILICON NITRIDE; TITANIUM NITRIDE;

EID: 0036927881     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (68)

References (8)
  • 1
    • 0033745206 scopus 로고    scopus 로고
    • Impact of gate workfunction on device performance at the 50nm technology node
    • I. De, D. Johri, A. Srivastava and C. M. Osbum, "Impact of gate workfunction on device performance at the 50nm technology node," Solid State Electronics, vol. 44, pp, 1077-80, 2000.
    • (2000) Solid State Electronics , vol.44 , pp. 1077-1080
    • De, I.1    Johri, D.2    Srivastava, A.3    Osbum, C.M.4
  • 2
    • 0035158946 scopus 로고    scopus 로고
    • Metal gates for advanced Sub-80-nm SOI CMOS technology
    • B. Cheng et al., "Metal Gates for Advanced Sub-80-nm SOI CMOS Technology," 2007 IEEE Intl. SOI Symp. Proc., pp. 91-92, 2001.
    • (2001) 2007 IEEE Intl. SOI Symp. Proc. , pp. 91-92
    • Cheng, B.1
  • 3
    • 0035525694 scopus 로고    scopus 로고
    • Work function engineering of molybdenum gate electrodes by nitrogen implantation
    • P. Ranade, J. Takeuchi, T-J. King and C. Hu, "Work function engineering of molybdenum gate electrodes by nitrogen implantation," Electrochem. and Solid-State Lett. vol. 4(11), pp. G85-7, 2001.
    • (2001) Electrochem. and Solid-State Lett. , vol.4 , Issue.11
    • Ranade, P.1    Takeuchi, J.2    King, T.-J.3    Hu, C.4
  • 5
    • 0012354409 scopus 로고    scopus 로고
    • (to be published)
    • T. Amada et al. MRS Symp. Proc. vol. 716, 2002 (to be published).
    • (2002) MRS Symp. Proc. , vol.716
    • Amada, T.1
  • 6
    • 0033700304 scopus 로고    scopus 로고
    • Dual-metal gate technology for deep submicron CMOS transistors
    • Q. Lu et al.,"Dual-metal gate technology for deep submicron CMOS transistors," Proc. Symp. on VLSI Tech. Digest, pp.72-73, 2000.
    • (2000) Proc. Symp. on VLSI Tech. Digest , pp. 72-73
    • Lu, Q.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.