High performance atomic-layer-deposited LaLuO3 /Ge -on-insulator p-channel metal-oxide-semiconductor field-effect transistor with thermally grown GeO2 as interfacial passivation layer

Applied Physics Letters

Volumn 97, Issue 1, 2010, Pages

  Gu, J J ^a   Liu, Y Q ^b   Xu, M ^a   Celler, G K ^c   Gordon, R G ^b   Ye, P D ^a  

^a PURDUE UNIVERSITY   (United States)

^b HARVARD UNIVERSITY   (United States)

^c Soitec USA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC LAYER DEPOSITED; ENHANCEMENT-MODE; EQUIVALENT OXIDE THICKNESS; GE ON INSULATORS; GERMANIUM-ON-INSULATOR; INTERFACE QUALITY; INTERFACIAL LAYER; INTERFACIAL PASSIVATION LAYERS; INVERSION CHARGE; LOW TEMPERATURES; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; MOS-FET; ON STATE CURRENT; SCATTERING MECHANISMS; SURFACE PASSIVATION; ULTRA-THIN;

DIELECTRIC DEVICES; FIELD EFFECT TRANSISTORS; GATE DIELECTRICS; GATES (TRANSISTOR); GERMANIUM; GERMANIUM OXIDES; HOLE MOBILITY; MOSFET DEVICES; SCATTERING;

PASSIVATION;

EID: 77954746877     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.3462303     Document Type: Article

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