Dipole moment model explaining nFET vt tuning utilizing La. Sc, Er, and Sr doped HfSiON dielectrics

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2007, Pages 68-69

  Sivasubramani, P ^a   Boscke T S ^b   Huang, J ^a   Young, C D ^a   Kirsch, P D ^c   Krishnan, S A ^a   Quevedo Lopez, M A ^b   Govindarajan, S ^b   Ju, B S ^a   Harris, H R ^b   Lichtenwalner, D J ^d   Jur, J S ^d   Kingon, A I ^d   Kim, J ^e   Gnade, B E ^e   Wallace, R M ^e   Bersuker, G ^a   Lee, B H ^c   Jammy, R ^c  

^a SEMATECH   (United States)

^b Qimonda ^*

^c IBM   (United States)

^d North Carolina State University   (United States)

^e The University of Texas at Dallas   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MOMENT MODEL; VLSI TECHNOLOGIES;

ELECTRIC DIPOLE MOMENTS;

DIPOLE MOMENT;

EID: 40949130851     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2007.4339730     Document Type: Conference Paper

References (8)

1. V. Narayanan VLSI p. 224 (2006).
2. H. Alshareef VLSI p. 10 (2006).
3. P. D. Kirsch IEDM p. 629 (2006).
4. H. R. Harris IEDM p. 633 (2006).
5. Y. Yamamoto SSDM p. 212 (2006).
6. P. D. Kirsch JAP 99 p. 023508 (2006).
7. M. A. Quevedo-Lopez IEDM p. 437 (2005).
8. H. Ono APL 78, p. 1833 (2001).