Dual work function metal gate CMOS technology using metal interdiffusion

IEEE Electron Device Letters

Volumn 22, Issue 9, 2001, Pages 444-446

  Polishchuk, Igor ^a,b   Ranade, Pushkar ^a,c   King, Tsu Jae ^a,b   Hu, Chenming ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Lawrence Berkeley National Laboratory   (United States)

Author keywords

Interdiffusion; Metal gate CMOS; Nickel; Titanium; Work function; X ray photoelectron spectroscopy

Indexed keywords

GATE DIELECTRIC SURFACE; GATE ELECTRODES; METAL INTERDIFFUSION;

DIELECTRIC MATERIALS; ELECTRODES; ETCHING; GATES (TRANSISTOR); MOSFET DEVICES; NICKEL; SEMICONDUCTOR METAL BOUNDARIES; THRESHOLD VOLTAGE; TITANIUM; VOLTAGE MEASUREMENT; X RAY PHOTOELECTRON SPECTROSCOPY;

CMOS INTEGRATED CIRCUITS;

EID: 0035446941     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.944334     Document Type: Article

References (8)

1. Impact of polysilicon depletion in thin oxide MOS technology
2. 5 gate dielectric prepared by in-situ rapid thermal processing
3. 2 and Zr silicate gate dielectrics
4. Dual-metal gate CMOS technology with ultra-thin silicon nitride gate dielectric
5. Gate length scaling and threshold voltage control of double-gate MOSFET's
6. High performance damascene metal gate MOSFET's for 0.1 μm regime