Fermi-level pinning at the polysilicon/metal-oxide interface - Part II

IEEE Transactions on Electron Devices

Volumn 51, Issue 6, 2004, Pages 978-984

  Hobbs, Christopher C ^a   Fonseca, Leonardo R C ^b   Knizhnik, Andrey ^c   Dhandapani, Veeraraghavan ^a   Samavedam, Srikanth B ^d   Taylor, William J ^a   Grant, John M ^a   Dip, LuRae G ^a   Triyoso, Dina H ^a   Hegde, Rama I ^a   Gilmer, David C ^a   Garcia, Ricardo ^a   Roan, Darrell ^a   Lovejoy, M Luke ^a   Rai, Raghaw S ^a   Hebert, Elizabeth A ^a   Tseng, Hsing Huang ^a   Anderson, Steven G H ^a   White, Bruce E ^a   Tobin, Philip J ^a  

^a MOTOROLA INC   (United States)

^b MOTOROLA INC   (United States)

^c KINTECH LAB LTD   (Russian Federation)

^d NanoCoolers   (United States)

Author keywords

Al2O3; Fermi pinning; Gate dielectric; HfO2; Polysilicon

Indexed keywords

ALUMINA; CHEMICAL BONDS; CHEMICAL VAPOR DEPOSITION; FERMI LEVEL; HAFNIUM COMPOUNDS; INTERFACES (MATERIALS); OXIDES; OXYGEN; POLYSILICON; THRESHOLD VOLTAGE;

ATOMIC LAYER DEPOSITION; ATOMISTIC SIMULATION; FERMI LEVEL PINNING; HAFNIUM DIOXIDE; METAL OXIDE; OXYGEN VACANCIES;

MOSFET DEVICES;

EID: 2942657401     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.829510     Document Type: Article

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