Metal gate work function adjustment for future CMOS technology

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue TECHNOLOGY SYMP., 2001, Pages 45-46

  Lu, Q ^a   Lin, R ^a   Ranade, P ^a   King, T J ^a   Hu, C ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRODES; ENERGY DISPERSIVE SPECTROSCOPY; FABRICATION; GATES (TRANSISTOR); MOSFET DEVICES; POLYSILICON; TRANSMISSION ELECTRON MICROSCOPY;

WORK FUNCTION;

CMOS INTEGRATED CIRCUITS;

EID: 0034790245     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Dual-metal gate technology for deep-submicron CMOS transistors
2. 2 gate dielectrics
3. Molybdenum as a gate electrode for deep-submicron CMOS technology
4. Quantum effect in oxide thickness determination from capacitance measurement