Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor

IEEE Electron Device Letters

Volumn 23, Issue 9, 2002, Pages 508-510

  Passlack, Matthias ^a,b   Abrokwah, Jonathan K ^a,b   Droopad, Ravi ^a,b   Yu, Zhiyi ^b   Overgaard, Corey ^b   Yi, Sang In ^c   Hale, Michael ^c   Sexton, Jonathan ^c   Kummel, Andrew C ^c  

^a IEEE   (United States)

^b MOTOROLA INC   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Gallium alloys; Indium alloys; MOSFETs; Semiconductor device modeling; Semiconductor heterojunctions; Semiconductor insulator interfaces

Indexed keywords

INTERFACE STATE DENSITIES; SELF-ALIGNED ENHANCEMENT MODES;

DIFFUSION; FERMI LEVEL; GATES (TRANSISTOR); HETEROJUNCTIONS; INTERFACES (MATERIALS); MOLECULAR BEAM EPITAXY; MONOLAYERS; SCANNING TUNNELING MICROSCOPY; SEMICONDUCTING GALLIUM COMPOUNDS; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR INSULATOR BOUNDARIES; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; ULTRAHIGH VACUUM;

MOSFET DEVICES;

EID: 0036714908     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2002.802591     Document Type: Article

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