High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1998, Pages 627-630

  Hargrove, M ^a   Crowder, S ^a   Nowak, E ^a   Logan, R ^a   Han, L K ^a   Ng, H ^a   Ray, A ^a   Sinitsky, D ^a   Smeys, P ^a   Guarin, F ^a   Oberschmidt, J ^a   Crabbe, E ^a   Yee, D ^a   Su, L ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; GATES (TRANSISTOR); MOSFET DEVICES; OXIDES;

GATE OXIDES;

CMOS INTEGRATED CIRCUITS;

EID: 18844480284     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)