Nanopackaging: Nanotechnologies and electronics packaging

Nanopackaging: Nanotechnologies and Electronics Packaging, Second Edition

Volumn , Issue , 2018, Pages

  Morris, James E ^a  

^a Department of Electrical and Computer Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; DIGITAL SIGNAL PROCESSORS; ELECTRON TUBES; FLIP CHIP DEVICES; INTEGRATED CIRCUIT DESIGN; SILICON WAFERS;

DIRECT CHIP ATTACH; HIGHER FREQUENCIES; MATERIAL SELECTION; MECHANICAL SUPPORT; SYSTEM IN A PACKAGES; THERMAL DISSIPATION; UNDERLYING PRINCIPLES; WAFER LEVEL PACKAGING;

SYSTEM-IN-PACKAGE;

EID: 85083937391     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-3-319-90362-0_1     Document Type: Chapter

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