Low-temperature sintered nanoscale silver as a novel semiconductor device-metallized substrate interconnect material

IEEE Transactions on Components and Packaging Technologies

Volumn 29, Issue 3, 2006, Pages 589-593

  Bai, John G ^a   Zhang, Zhiye Zach ^a   Calata, Jesus N ^a   Lu, Guo Quan ^a  

^a Virginia Polytechnic Institute and State University   (United States)

Author keywords

Elastic modulus; Nanoscale silver paste; Sintered

Indexed keywords

ELASTIC MODULI; ELECTRIC CONDUCTIVITY; POROSITY; SINTERING; STRESSES; SUBSTRATES; THERMAL CONDUCTIVITY; THERMAL EXPANSION;

METALLIZED SUBSTRATE INTERCONNECT MATERIAL; NANOSCALE SILVER PASTE; SILVER PARTICLES; SINTERED POROUS SILVER;

SILVER;

EID: 33748585230     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAPT.2005.853167     Document Type: Article

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