Electrical interconnects made of carbon nanotubes: Applications in 3D chip stacking

IMAPS Nordic Annual Conference Proceedings 2012

Volumn , Issue , 2012, Pages 150-159

  Jiang, Di ^a   Ye, Lilei ^b   Jeppson, Kjell ^a   Liu, Johan ^a,c  

^a CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

^b SHT SMART HIGH TECH AB   (Sweden)

^c Shanghai University Campus   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED PACKAGING; CHIP INTEGRATION; CHIP STACKING; DOWN-SCALING; DRIVING FORCES; ELECTRICAL AND MECHANICAL PROPERTIES; ELECTRICAL INTERCONNECTS; ELECTRONIC PACKAGING; HIGH DENSITY; INTEGRATED ELECTRONICS; INTEGRATION TECHNOLOGIES; MANUFACTURABILITY; POWER DISTRIBUTIONS; SEMICONDUCTOR ELECTRONICS; SIGNAL TRANSFER; STACKED LAYER; SYSTEM LEVELS; THREE DIMENSIONAL (3D) INTEGRATION; THROUGH SILICON VIAS;

CARBON NANOTUBES; ELECTRONICS PACKAGING; INTEGRATION; MECHANICAL PROPERTIES; PACKAGING;

THREE DIMENSIONAL COMPUTER GRAPHICS;

EID: 84871761393     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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