Front-end process modeling in silicon

European Physical Journal B

Volumn 72, Issue 3, 2009, Pages 323-359

  Pelaz, L ^a   Marques L A ^a   Aboy, M ^a   Lopez P ^a   Santos, I ^a  

^a UNIVERSITY OF VALLADOLID   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMISTIC MODELING; CONTINUUM MODELING; DEFECT INTERACTIONS; EXTENDED DEFECT; FRONT-END PROCESS; FRONT-END PROCESSING; GAIN INSIGHT; HIERARCHICAL SIMULATION; IN-PROCESS; JUNCTION FORMATION; NANOMETER SIZE; PROCESS OPTIMIZATION; SEMICONDUCTOR INDUSTRY; SIMPLIFIED MODELS; THERMAL ANNEALS;

CONTINUUM MECHANICS; ION BOMBARDMENT; ION IMPLANTATION; OPTIMIZATION; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR JUNCTIONS;

SIMULATORS;

EID: 72449207968     PISSN: 14346028     EISSN: 14346036     Source Type: Journal    
DOI: 10.1140/epjb/e2009-00378-9     Document Type: Article

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