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Volumn 2, Issue 4, 2003, Pages 285-290

On the FinFET extension implant energy

Author keywords

Double gate mosfet; Extension implant; Finfet; MOSFET; Semiconductor device and process modeling; Spike annealing, ultrashallow junction

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRODES; GATES (TRANSISTOR); SEMICONDUCTOR DEVICES; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS;

EID: 3042762658     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2003.820783     Document Type: Conference Paper
Times cited : (25)

References (22)
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    • SIA, San Jose, CA. [Online]
    • Semiconductor Industry Association. (2002) The International Techriology Roadmap for Semiconductors. SIA, San Jose, CA. [Online]. Available: http://public.itrs.net/Files/2002Update/Home.pdf
    • (2002) The International Techriology Roadmap for Semiconductors
  • 13
    • 0035340554 scopus 로고    scopus 로고
    • Sub-50 nm p-channel FinFET
    • May
    • X. Huang, "Sub-50 nm p-channel FinFET," IEEE Trans. Electron Devices, vol. 48, pp. 880-886, May 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , pp. 880-886
    • Huang, X.1
  • 17
    • 34047164707 scopus 로고
    • Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation
    • New York, USA
    • M. R. Pinto, D. M. Boulin, C. S. Rafferty, R. K. Smith, W. M. Coughran Jr., I. C. Kizilyalli, and M. J. Thoma, "Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation," in Proc. IEEE IEDM, New York, USA, 1992, pp. 923-926.
    • (1992) Proc. IEEE IEDM , pp. 923-926
    • Pinto, M.R.1    Boulin, D.M.2    Rafferty, C.S.3    Smith, R.K.4    Coughran Jr., W.M.5    Kizilyalli, I.C.6    Thoma, M.J.7
  • 20
    • 78649844915 scopus 로고    scopus 로고
    • Ultrashallow junction formation using conventional ion implantation and rapid thermal annealing
    • Piscataway, NJ
    • A. Agarwal, "Ultrashallow junction formation using conventional ion implantation and rapid thermal annealing," in Proc. IEEE Int. Conf. Ion Implantation Technology, Piscataway, NJ, 2000, pp. 293-299.
    • (2000) Proc. IEEE Int. Conf. Ion Implantation Technology , pp. 293-299
    • Agarwal, A.1
  • 21
    • 25944459523 scopus 로고    scopus 로고
    • Maximum activation and minimum diffusion by millisecond annealing-the key to shallow junction formation
    • to be published
    • P. B. Griffin, "Maximum activation and minimum diffusion by millisecond annealing-The key to shallow junction formation," in MRS Symp. Proc., vol. 765, pp. D5.6.1-D5.6.6, to be published.
    • MRS Symp. Proc. , vol.765
    • Griffin, P.B.1
  • 22
    • 11344284982 scopus 로고
    • High-concentration boron diffusion in silicon: Simulation of the precipitation phenomena
    • S. Solmi, E. Landi, and F. Baruffaldi, "High-concentration boron diffusion in silicon: Simulation of the precipitation phenomena," J. Appl. Phys., vol. 68, pp. 3250-3258, 1990.
    • (1990) J. Appl. Phys. , vol.68 , pp. 3250-3258
    • Solmi, S.1    Landi, E.2    Baruffaldi, F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.