메뉴 건너뛰기




Volumn 51, Issue 1, 2007, Pages 16-37

Low-frequency noise in silicon-on-insulator devices and technologies

Author keywords

Flicker noise; Floating body effects; Front back gate coupling; Low frequency noise; Multi gate FETs; Silicon on insulator (SOI)

Indexed keywords

CARRIER CONCENTRATION; ELECTRON TRAPS; GATES (TRANSISTOR); MOSFET DEVICES; SPURIOUS SIGNAL NOISE; SUBSTRATES;

EID: 33846592716     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2006.12.003     Document Type: Review
Times cited : (54)

References (149)
  • 1
    • 0030193606 scopus 로고    scopus 로고
    • The low-frequency noise behaviour of silicon-on-insulator technologies
    • Simoen E., and Claeys C. The low-frequency noise behaviour of silicon-on-insulator technologies. Solid-State Electron 39 (1996) 949-960
    • (1996) Solid-State Electron , vol.39 , pp. 949-960
    • Simoen, E.1    Claeys, C.2
  • 3
    • 0029637854 scopus 로고
    • Silicon-on-insulator material technology
    • Bruel M. Silicon-on-insulator material technology. Electron Lett 31 (1995) 1201-1202
    • (1995) Electron Lett , vol.31 , pp. 1201-1202
    • Bruel, M.1
  • 4
    • 33846618422 scopus 로고    scopus 로고
    • note
    • URL: .
  • 5
    • 0037566742 scopus 로고    scopus 로고
    • Frontiers of silicon-on-insulator
    • Celler G.K., and Cristoloveanu S. Frontiers of silicon-on-insulator. J Appl Phys 93 (2003) 4955-4978
    • (2003) J Appl Phys , vol.93 , pp. 4955-4978
    • Celler, G.K.1    Cristoloveanu, S.2
  • 6
    • 2942618387 scopus 로고    scopus 로고
    • Low frequency noise assessment of silicon substrates and process modules for deep submicron CMOS technology nodes
    • Claeys C., Mercha A., and Simoen E. Low frequency noise assessment of silicon substrates and process modules for deep submicron CMOS technology nodes. J Electrochem Soc 151 (2004) G307-G318
    • (2004) J Electrochem Soc , vol.151
    • Claeys, C.1    Mercha, A.2    Simoen, E.3
  • 8
    • 33846633894 scopus 로고    scopus 로고
    • Special issue on noise. IEEE Trans Electron Dev, Nov; 1994.
  • 10
    • 0002868708 scopus 로고
    • 1/f noise and germanium surface properties
    • Kingston R.H. (Ed), University of Pennsylvania Press, Philadelphia, PA
    • McWhorter A.L. 1/f noise and germanium surface properties. In: Kingston R.H. (Ed). Semiconductor surface physics (1957), University of Pennsylvania Press, Philadelphia, PA 207
    • (1957) Semiconductor surface physics , pp. 207
    • McWhorter, A.L.1
  • 11
    • 0031208585 scopus 로고    scopus 로고
    • Low frequency noise characterization of 0.25 μm Si CMOS transistors
    • Boutchacha T., Ghibaudo G., Guégan G., and Haond M. Low frequency noise characterization of 0.25 μm Si CMOS transistors. J Non-Cryst Solids 216 (1997) 192-197
    • (1997) J Non-Cryst Solids , vol.216 , pp. 192-197
    • Boutchacha, T.1    Ghibaudo, G.2    Guégan, G.3    Haond, M.4
  • 12
    • 0347338037 scopus 로고    scopus 로고
    • Impact of the high vertical field on low frequency noise in deep submicron MOSFETs
    • Mercha A., Simoen E., and Claeys C. Impact of the high vertical field on low frequency noise in deep submicron MOSFETs. IEEE Trans Electron Dev 50 (2003) 2520-2527
    • (2003) IEEE Trans Electron Dev , vol.50 , pp. 2520-2527
    • Mercha, A.1    Simoen, E.2    Claeys, C.3
  • 13
    • 24544459259 scopus 로고
    • 1/f noise is no surface effect
    • Hooge F.N. 1/f noise is no surface effect. Phys Lett 29A (1969) 139
    • (1969) Phys Lett , vol.29 A , pp. 139
    • Hooge, F.N.1
  • 15
    • 0028533096 scopus 로고
    • Parameter extraction and 1/f noise in a surface and a bulk-type, p-channel LDD MOSFET
    • Li X.S., Barros C., Vandamme E.P., and Vandamme L.K.J. Parameter extraction and 1/f noise in a surface and a bulk-type, p-channel LDD MOSFET. Solid-State Electron 37 (1994) 1853-1862
    • (1994) Solid-State Electron , vol.37 , pp. 1853-1862
    • Li, X.S.1    Barros, C.2    Vandamme, E.P.3    Vandamme, L.K.J.4
  • 16
    • 19944381220 scopus 로고    scopus 로고
    • Impact of high-k gate stack material with metal gates on LF noise in n- and p-MOSFETs
    • Srinivasan P., Simoen E., Pantisano L., Claeys C., and Misra D. Impact of high-k gate stack material with metal gates on LF noise in n- and p-MOSFETs. Microelectron Eng 80 (2005) 226-229
    • (2005) Microelectron Eng , vol.80 , pp. 226-229
    • Srinivasan, P.1    Simoen, E.2    Pantisano, L.3    Claeys, C.4    Misra, D.5
  • 17
    • 0020830319 scopus 로고
    • Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFETs
    • Lim H.-K., and Fossum J.G. Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFETs. IEEE Trans Electron Dev 30 (1983) 1244-1251
    • (1983) IEEE Trans Electron Dev , vol.30 , pp. 1244-1251
    • Lim, H.-K.1    Fossum, J.G.2
  • 20
    • 2942661718 scopus 로고    scopus 로고
    • Critical discussion of the front-back gate coupling effect on the low-frequency noise in fully depleted SOI MOSFETs
    • Simoen E., Mercha A., Claeys C., Lukyanchikova N., and Garbar N. Critical discussion of the front-back gate coupling effect on the low-frequency noise in fully depleted SOI MOSFETs. IEEE Trans Electron Dev 51 (2004) 1008-1016
    • (2004) IEEE Trans Electron Dev , vol.51 , pp. 1008-1016
    • Simoen, E.1    Mercha, A.2    Claeys, C.3    Lukyanchikova, N.4    Garbar, N.5
  • 23
    • 0028409304 scopus 로고
    • Experimental investigation and numerical simulation of low-frequency noise in thin film SOI MOSFETs
    • Jomaah J., Balestra F., and Ghibaudo G. Experimental investigation and numerical simulation of low-frequency noise in thin film SOI MOSFETs. Phys Status Solidi 142 (1994) 533-537
    • (1994) Phys Status Solidi , vol.142 , pp. 533-537
    • Jomaah, J.1    Balestra, F.2    Ghibaudo, G.3
  • 24
    • 0036642930 scopus 로고    scopus 로고
    • Impact of front oxide quality on transient effects and low-frequency noise in partially and fully depleted SOI nMOSFETs
    • Haendler S., Dieudonné F., Jomaah J., Balestra F., Raynaud C., and Pelloie J.L. Impact of front oxide quality on transient effects and low-frequency noise in partially and fully depleted SOI nMOSFETs. Solid-State Electron 46 (2002) 1013-1017
    • (2002) Solid-State Electron , vol.46 , pp. 1013-1017
    • Haendler, S.1    Dieudonné, F.2    Jomaah, J.3    Balestra, F.4    Raynaud, C.5    Pelloie, J.L.6
  • 26
    • 33846636570 scopus 로고    scopus 로고
    • Nève A, Dessard V, Delatte P, Brodeoux V, Iñíguez B, Rauly E, et al. Improvement of sub-0.25 μm fully-depleted SOI CMOS analog performance by thinning the Si film. In: Cristoloveanu S, Celler GK, Hemment PLF, Assaderaghi F, Izumi KT, Kim Y-W, editors. Proceedings of the tenth international symposium on silicon-on-insulator technology and devices. The Electrochem Soc Softbound Series, Pennington, New Jersey; 2001-3. p. 271.
  • 27
    • 33846626585 scopus 로고    scopus 로고
    • Zafari L, Jomaah J, Ghibaudo G. Low frequency noise in multi-gate SOI CMOS devices. In: EUROSOI 2006 - Conference Proc, Grenoble; 2006. p. 141.
  • 28
    • 33846624433 scopus 로고    scopus 로고
    • Eminente S, Cristoloveanu S, Clerc R, Ohata A, Ghibaudo G. Ultra-thin fully-depleted SOI MOSFETs: special charge properties and coupling effects. In: EUROSOI 2006 - Conference Proc, Grenoble; 2006. p. 57.
  • 29
    • 0029287689 scopus 로고
    • A physical charge-based model for nonfully depleted SOI MOSFETs and its use in assessing floating-body effects in SOI CMOS circuits
    • Suh D., and Fossum J.G. A physical charge-based model for nonfully depleted SOI MOSFETs and its use in assessing floating-body effects in SOI CMOS circuits. IEEE Trans Electron Dev 42 (1995) 728-737
    • (1995) IEEE Trans Electron Dev , vol.42 , pp. 728-737
    • Suh, D.1    Fossum, J.G.2
  • 30
    • 0033169525 scopus 로고    scopus 로고
    • AC floating body effects and the resultant analog circuit issues in submicron floating body and body-grounded SOI MOSFET's
    • Tseng Y.-C., Huang M.W., Monk D.J., Welch P., Ford J.M., and Woo J.C.S. AC floating body effects and the resultant analog circuit issues in submicron floating body and body-grounded SOI MOSFET's. IEEE Trans Electron Dev 46 (1999) 1685-1692
    • (1999) IEEE Trans Electron Dev , vol.46 , pp. 1685-1692
    • Tseng, Y.-C.1    Huang, M.W.2    Monk, D.J.3    Welch, P.4    Ford, J.M.5    Woo, J.C.S.6
  • 31
    • 0032632929 scopus 로고    scopus 로고
    • Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's
    • Jin W., Chan P.C.H., Fung S.K.H., and Ko P.K. Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's. IEEE Trans Electron Dev 46 (1999) 1180-1185
    • (1999) IEEE Trans Electron Dev , vol.46 , pp. 1180-1185
    • Jin, W.1    Chan, P.C.H.2    Fung, S.K.H.3    Ko, P.K.4
  • 33
    • 0035395568 scopus 로고    scopus 로고
    • Comprehensive study on low-frequency noise characteristics in surface channel SOI CMOSFETs and device design optimization for RF ICs
    • Tseng Y.-C., Huang W.M., Mendicino M., Monk D.J., Welch P.J., and Woo J.C.S. Comprehensive study on low-frequency noise characteristics in surface channel SOI CMOSFETs and device design optimization for RF ICs. IEEE Trans Electron Dev 48 (2001) 1428-1437
    • (2001) IEEE Trans Electron Dev , vol.48 , pp. 1428-1437
    • Tseng, Y.-C.1    Huang, W.M.2    Mendicino, M.3    Monk, D.J.4    Welch, P.J.5    Woo, J.C.S.6
  • 34
  • 35
    • 0032276256 scopus 로고    scopus 로고
    • Device design methodology to optimize low-frequency noise in advanced SOI CMOS technology for RF IC's
    • The IEEE, New York
    • Tseng Y.-C., Huang W.M., Mendicino M., Ngo D., Ilderem V., and Woo J.C.S. Device design methodology to optimize low-frequency noise in advanced SOI CMOS technology for RF IC's. IEDM Techn Dig (1998), The IEEE, New York 949
    • (1998) IEDM Techn Dig , pp. 949
    • Tseng, Y.-C.1    Huang, W.M.2    Mendicino, M.3    Ngo, D.4    Ilderem, V.5    Woo, J.C.S.6
  • 36
    • 0030647288 scopus 로고    scopus 로고
    • Correlation between low-frequency noise overshoot in SOI MOSFETs and frequency dependence of floating body effect
    • The IEEE, New York
    • Tseng Y.-C., Huang W.M., Babcock J.A., Ford J.M., and Woo J.C.S. Correlation between low-frequency noise overshoot in SOI MOSFETs and frequency dependence of floating body effect. Symposium on VLSI Techn Dig Tech Papers (1997), The IEEE, New York 99
    • (1997) Symposium on VLSI Techn Dig Tech Papers , pp. 99
    • Tseng, Y.-C.1    Huang, W.M.2    Babcock, J.A.3    Ford, J.M.4    Woo, J.C.S.5
  • 37
    • 0032069645 scopus 로고    scopus 로고
    • Empirical correlation between AC kink and low-frequency noise overshoot in SOI MOSFET's
    • Tseng Y.-C., Huang W.-L.M., Welch P.J., Ford J.M., and Woo J.C.S. Empirical correlation between AC kink and low-frequency noise overshoot in SOI MOSFET's. IEEE Electron Dev Lett 19 (1998) 157-159
    • (1998) IEEE Electron Dev Lett , vol.19 , pp. 157-159
    • Tseng, Y.-C.1    Huang, W.-L.M.2    Welch, P.J.3    Ford, J.M.4    Woo, J.C.S.5
  • 39
    • 0034298166 scopus 로고    scopus 로고
    • AC floating body effects in partially depleted floating body SOI nMOS operated at elevated temperature: An analog circuit prospective
    • Tseng Y.-C., Huang W.M., Hwang C., and Woo J.C.S. AC floating body effects in partially depleted floating body SOI nMOS operated at elevated temperature: An analog circuit prospective. IEEE Electron Dev Lett 21 (2000) 494-496
    • (2000) IEEE Electron Dev Lett , vol.21 , pp. 494-496
    • Tseng, Y.-C.1    Huang, W.M.2    Hwang, C.3    Woo, J.C.S.4
  • 42
    • 0032595839 scopus 로고    scopus 로고
    • Floating body induced pre-kink excess low-frequency noise in submicron SOI CMOSFET technology
    • Tseng Y.-C., Huang W.M., Ilderem V., and Woo J.C.S. Floating body induced pre-kink excess low-frequency noise in submicron SOI CMOSFET technology. IEEE Electron Dev Lett 20 (1999) 484-486
    • (1999) IEEE Electron Dev Lett , vol.20 , pp. 484-486
    • Tseng, Y.-C.1    Huang, W.M.2    Ilderem, V.3    Woo, J.C.S.4
  • 43
    • 0002832328 scopus 로고    scopus 로고
    • Dessard V, Flandre D. Low frequency noise measurements at elevated temperatures on thin-film SOI nMOSFET. In: Touboul A, Danto Y, Klein JP, Grünbacher H, editors. Proceedings of ESSDERC '98; 1998. p. 604.
  • 44
    • 0036637862 scopus 로고    scopus 로고
    • SOI nMOSFET low-frequency noise measurements and modeling from room temperature up to 250 °C
    • Dessard V., Iñíguez B., Adriaensen S., and Flandre D. SOI nMOSFET low-frequency noise measurements and modeling from room temperature up to 250 °C. IEEE Trans Electron Dev 49 (2002) 1289-1295
    • (2002) IEEE Trans Electron Dev , vol.49 , pp. 1289-1295
    • Dessard, V.1    Iñíguez, B.2    Adriaensen, S.3    Flandre, D.4
  • 45
    • 0033750499 scopus 로고    scopus 로고
    • Physical noise modeling of SOI MOSFET's with analysis of the Lorentzian component in the low-frequency noise spectrum
    • Workman G.O., and Fossum J.G. Physical noise modeling of SOI MOSFET's with analysis of the Lorentzian component in the low-frequency noise spectrum. IEEE Trans Electron Dev 47 (2000) 1100-1192
    • (2000) IEEE Trans Electron Dev , vol.47 , pp. 1100-1192
    • Workman, G.O.1    Fossum, J.G.2
  • 48
    • 0036656333 scopus 로고    scopus 로고
    • Impact of hot-carrier stress on low-frequency noise characteristics in floating-body silicon-on-insulator metal oxide semiconductor field-effect transistors
    • Tsuchiya T., Yoshida T., and Sato Y. Impact of hot-carrier stress on low-frequency noise characteristics in floating-body silicon-on-insulator metal oxide semiconductor field-effect transistors. Jpn J Appl Phys 41 (2002) 4427-4431
    • (2002) Jpn J Appl Phys , vol.41 , pp. 4427-4431
    • Tsuchiya, T.1    Yoshida, T.2    Sato, Y.3
  • 49
    • 23944514262 scopus 로고    scopus 로고
    • Degradation of low-frequency noise in partially depleted silicon-on-insulator metal oxide semiconductor field-effect transistors by hot-carrier stress
    • Chen K.-M., Hu H.-H., Huang G.-W., and Chang C.-Y. Degradation of low-frequency noise in partially depleted silicon-on-insulator metal oxide semiconductor field-effect transistors by hot-carrier stress. Jpn J Appl Phys 44 (2005) 3832-3835
    • (2005) Jpn J Appl Phys , vol.44 , pp. 3832-3835
    • Chen, K.-M.1    Hu, H.-H.2    Huang, G.-W.3    Chang, C.-Y.4
  • 50
    • 3042988745 scopus 로고    scopus 로고
    • Jomaah J, Dixkens D, Pelloie JL, Balestra F. Impact of latch phenomenon on low frequency noise in SOI MOSFETS. In: Proceedings of ESSDERC; 1996. p. 87.
  • 51
    • 0032043205 scopus 로고    scopus 로고
    • Impact of latch phenomenon on low-frequency noise in SOI MOSFETs
    • Jomaah J., and Balestra F. Impact of latch phenomenon on low-frequency noise in SOI MOSFETs. Microelectron Reliab 38 (1998) 567-570
    • (1998) Microelectron Reliab , vol.38 , pp. 567-570
    • Jomaah, J.1    Balestra, F.2
  • 52
    • 0041441251 scopus 로고    scopus 로고
    • "Linear Kink Effect" induced by valence band electron tunneling in ultra-thin gate oxide bulk and SOI MOSFETs
    • Mercha A., Rafí J.M., Simoen E., Augendre E., and Claeys C. "Linear Kink Effect" induced by valence band electron tunneling in ultra-thin gate oxide bulk and SOI MOSFETs. IEEE Trans Electron Dev 50 (2003) 1675-1682
    • (2003) IEEE Trans Electron Dev , vol.50 , pp. 1675-1682
    • Mercha, A.1    Rafí, J.M.2    Simoen, E.3    Augendre, E.4    Claeys, C.5
  • 53
    • 0037451258 scopus 로고    scopus 로고
    • Low-frequency noise overshoot in ultra-thin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors
    • Mercha A., Simoen E., van Meer H., and Claeys C. Low-frequency noise overshoot in ultra-thin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors. Appl Phys Lett 82 (2003) 1790-1792
    • (2003) Appl Phys Lett , vol.82 , pp. 1790-1792
    • Mercha, A.1    Simoen, E.2    van Meer, H.3    Claeys, C.4
  • 54
    • 0037004954 scopus 로고    scopus 로고
    • Gate-induced floating body effect excess noise in partially depleted SOI MOSFETs
    • Dieudonné F., Jomaah J., and Balestra F. Gate-induced floating body effect excess noise in partially depleted SOI MOSFETs. IEEE Electron Dev Lett 23 (2002) 737-739
    • (2002) IEEE Electron Dev Lett , vol.23 , pp. 737-739
    • Dieudonné, F.1    Jomaah, J.2    Balestra, F.3
  • 55
    • 0142023818 scopus 로고    scopus 로고
    • Electron valence-band tunneling-induced Lorentzian noise in deep submicron silicon-on-insulator metal-oxide-semiconductor field-effect transistors
    • Lukyanchikova N.B., Petrichuk M.V., Garbar N., Mercha A., Simoen E., and Claeys C. Electron valence-band tunneling-induced Lorentzian noise in deep submicron silicon-on-insulator metal-oxide-semiconductor field-effect transistors. J Appl Phys 94 (2003) 4461-4469
    • (2003) J Appl Phys , vol.94 , pp. 4461-4469
    • Lukyanchikova, N.B.1    Petrichuk, M.V.2    Garbar, N.3    Mercha, A.4    Simoen, E.5    Claeys, C.6
  • 56
    • 1242265409 scopus 로고    scopus 로고
    • Short-channel effects in the Lorentzian noise induced by the EVB tunneling in partially-depleted SOI MOSFETs
    • Lukyanchikova N., Garbar N., Smolanka A., Simoen E., Mercha A., and Claeys C. Short-channel effects in the Lorentzian noise induced by the EVB tunneling in partially-depleted SOI MOSFETs. Solid-State Electron 48 (2004) 747-758
    • (2004) Solid-State Electron , vol.48 , pp. 747-758
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Simoen, E.4    Mercha, A.5    Claeys, C.6
  • 57
    • 84907693455 scopus 로고    scopus 로고
    • Electron Valence Band tunnelling induced excess Lorentzian noise in fully depleted SOI transistors
    • The IEEE, New York
    • Simoen E., Mercha A., Claeys C., Lukyanchikova N.B., and Garbar N. Electron Valence Band tunnelling induced excess Lorentzian noise in fully depleted SOI transistors. Proceedings ESSDERC 2003 (2003), The IEEE, New York 279
    • (2003) Proceedings ESSDERC 2003 , pp. 279
    • Simoen, E.1    Mercha, A.2    Claeys, C.3    Lukyanchikova, N.B.4    Garbar, N.5
  • 58
    • 0347270399 scopus 로고    scopus 로고
    • Explaining the parameters of the Electron Valence-Band tunneling related Lorentzian noise in fully depleted SOI MOSFETs
    • Simoen E., Mercha A., Rafí J.M., Claeys C., Lukyanchikova N.B., and Garbar N. Explaining the parameters of the Electron Valence-Band tunneling related Lorentzian noise in fully depleted SOI MOSFETs. IEEE Electron Dev Lett 24 (2003) 751-754
    • (2003) IEEE Electron Dev Lett , vol.24 , pp. 751-754
    • Simoen, E.1    Mercha, A.2    Rafí, J.M.3    Claeys, C.4    Lukyanchikova, N.B.5    Garbar, N.6
  • 60
    • 2942726533 scopus 로고    scopus 로고
    • Excess Lorentzian noise in partially-depleted SOI nMOSFETs induced by an accumulation back-gate bias
    • Lukyanchikova N., Garbar N., Smolanka A., Simoen E., and Claeys C. Excess Lorentzian noise in partially-depleted SOI nMOSFETs induced by an accumulation back-gate bias. IEEE Electron Dev Lett 25 (2004) 433-436
    • (2004) IEEE Electron Dev Lett , vol.25 , pp. 433-436
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Simoen, E.4    Claeys, C.5
  • 61
    • 2342580261 scopus 로고    scopus 로고
    • High-energy proton irradiation induced changes in the linear-kink noise overshoot of 0.10 μm partially depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistors
    • Simoen E., Mercha A., Rafí J.M., Claeys C., Lukyanchikova N.B., Smolanka A.M., et al. High-energy proton irradiation induced changes in the linear-kink noise overshoot of 0.10 μm partially depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistors. J Appl Phys 95 (2004) 4084-4092
    • (2004) J Appl Phys , vol.95 , pp. 4084-4092
    • Simoen, E.1    Mercha, A.2    Rafí, J.M.3    Claeys, C.4    Lukyanchikova, N.B.5    Smolanka, A.M.6
  • 62
    • 4344588174 scopus 로고    scopus 로고
    • Lukyanchikova N, Garbar N, Smolanka A, Simoen E, Claeys C. Impact of the back-gate bias on the low-frequency noise of partially depleted silicon-on-insulator MOSFETs. In: Danneville F, Bonani F, Deen MJ, editors. Proceedings of noise in devices and circuits II, Proceedings of SPIE, 5470; 2004. p. 208.
  • 64
    • 29144437780 scopus 로고    scopus 로고
    • Origin of the front-back-gate coupling in partially depleted and fully depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistors with accumulated back gate
    • Lukyanchikova N., Garbar N., Smolanka A., Lokshin M., Simoen E., and Claeys C. Origin of the front-back-gate coupling in partially depleted and fully depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistors with accumulated back gate. J Appl Phys 98 (2005) 114506
    • (2005) J Appl Phys , vol.98 , pp. 114506
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Lokshin, M.4    Simoen, E.5    Claeys, C.6
  • 65
    • 0012278046 scopus 로고
    • Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise
    • Kirton M.J., and Uren M.J. Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise. Adv Phys 38 (1989) 367-468
    • (1989) Adv Phys , vol.38 , pp. 367-468
    • Kirton, M.J.1    Uren, M.J.2
  • 66
    • 0034245614 scopus 로고    scopus 로고
    • Impact of the device scaling on the low-frequency noise in nMOSFETs
    • Bu H.M., Shi Y., Yuan X.L., Zheng Y.D., Gu S.H., Majima H., et al. Impact of the device scaling on the low-frequency noise in nMOSFETs. Appl Phys A 71 (2000) 133-136
    • (2000) Appl Phys A , vol.71 , pp. 133-136
    • Bu, H.M.1    Shi, Y.2    Yuan, X.L.3    Zheng, Y.D.4    Gu, S.H.5    Majima, H.6
  • 67
    • 0035124567 scopus 로고    scopus 로고
    • Switching kinetics of interface states in deep submicrometre SOI nMOSFETs
    • Shi Y., Bu H.M., Yuan X.L., Gu S.L., Shen B., Han P., et al. Switching kinetics of interface states in deep submicrometre SOI nMOSFETs. Semicond Sci Technol 16 (2001) 21-25
    • (2001) Semicond Sci Technol , vol.16 , pp. 21-25
    • Shi, Y.1    Bu, H.M.2    Yuan, X.L.3    Gu, S.L.4    Shen, B.5    Han, P.6
  • 69
    • 0030107494 scopus 로고    scopus 로고
    • Back and front interface related generation-recombination noise in buried-channel SOI pMOSFET's
    • Lukyanchikova N., Petrichuk M., Garbar N., Simoen E., and Claeys C. Back and front interface related generation-recombination noise in buried-channel SOI pMOSFET's. IEEE Trans Electron Dev 43 (1996) 417-423
    • (1996) IEEE Trans Electron Dev , vol.43 , pp. 417-423
    • Lukyanchikova, N.1    Petrichuk, M.2    Garbar, N.3    Simoen, E.4    Claeys, C.5
  • 72
    • 0035506344 scopus 로고    scopus 로고
    • Generation-recombination noise in the near fully depleted SIMOX nMOSFET operating in the linear regime
    • Ang D.S., Lun Z., and Ling C.H. Generation-recombination noise in the near fully depleted SIMOX nMOSFET operating in the linear regime. IEEE Electron Dev Lett 22 (2001) 545-547
    • (2001) IEEE Electron Dev Lett , vol.22 , pp. 545-547
    • Ang, D.S.1    Lun, Z.2    Ling, C.H.3
  • 73
    • 0347968287 scopus 로고    scopus 로고
    • Generation-recombination noise in the near fully depleted SIMOX SOI nMOSFET - Physical characteristics and modeling
    • Ang D.S., Lun Z., and Ling C.H. Generation-recombination noise in the near fully depleted SIMOX SOI nMOSFET - Physical characteristics and modeling. IEEE Trans Electron Dev 50 (2003) 2490-2498
    • (2003) IEEE Trans Electron Dev , vol.50 , pp. 2490-2498
    • Ang, D.S.1    Lun, Z.2    Ling, C.H.3
  • 75
    • 1642634148 scopus 로고    scopus 로고
    • Generation of metastable electron traps in the near interfacial region of SOI buried oxides by ion implantation and their effect on device properties
    • Schwank J.R., Fleetwood D.M., Xiong H.D., Shaneyfelt M.R., and Draper B.L. Generation of metastable electron traps in the near interfacial region of SOI buried oxides by ion implantation and their effect on device properties. Microelectron Eng 72 (2004) 362-366
    • (2004) Microelectron Eng , vol.72 , pp. 362-366
    • Schwank, J.R.1    Fleetwood, D.M.2    Xiong, H.D.3    Shaneyfelt, M.R.4    Draper, B.L.5
  • 76
    • 0033723901 scopus 로고    scopus 로고
    • Kink-related excess noise in deep submicron partially and moderately fully depleted Unibond n-metal oxide semiconductor field effect transistor (MOSFET)
    • Haendler S., Jomaah J., Balestra F., Pelloie J.L., and Raynaud C. Kink-related excess noise in deep submicron partially and moderately fully depleted Unibond n-metal oxide semiconductor field effect transistor (MOSFET). Jpn J Appl Phys 39 (2000) 2261-2263
    • (2000) Jpn J Appl Phys , vol.39 , pp. 2261-2263
    • Haendler, S.1    Jomaah, J.2    Balestra, F.3    Pelloie, J.L.4    Raynaud, C.5
  • 77
    • 0032480203 scopus 로고    scopus 로고
    • Investigation of the reliability of Unibond and SIMOX nMOSFETs using charge pumping and noise techniques
    • Renn S.-H., Jomaah J., Raynaud C., and Balestra F. Investigation of the reliability of Unibond and SIMOX nMOSFETs using charge pumping and noise techniques. Electron Lett 34 (1998) 1788-1789
    • (1998) Electron Lett , vol.34 , pp. 1788-1789
    • Renn, S.-H.1    Jomaah, J.2    Raynaud, C.3    Balestra, F.4
  • 78
    • 0034510221 scopus 로고    scopus 로고
    • Effect of starting SOI material quality on low-frequency noise characteristics in partially depleted floating-body SOI MOSFETs
    • Ushiki T., Ishino H., and Ohmi T. Effect of starting SOI material quality on low-frequency noise characteristics in partially depleted floating-body SOI MOSFETs. IEEE Electron Dev Lett 21 (2000) 610-612
    • (2000) IEEE Electron Dev Lett , vol.21 , pp. 610-612
    • Ushiki, T.1    Ishino, H.2    Ohmi, T.3
  • 79
    • 33846644652 scopus 로고    scopus 로고
    • Lartigau I, Routoure J-M, Carin R, Mercha A, Simoen E, Claeys C. Low temperature noise spectroscopy of 0.1 μm partially depleted silicon on insulator MOSFETs. In: Sikula J, editor. Proceedings of the 17th international conference on noise and fluctuations - ICNF 2003. CNRL sro, Brno, Czech Republic; 2003. p. 763.
  • 80
    • 0041424951 scopus 로고    scopus 로고
    • Flicker noise behavior of MOSFETs fabricated in 0.5 μm fully depleted (FD) silicon-on-sapphire (SOS) CMOS in weak, moderate, and strong inversion
    • Ericson M.N., Britton Jr. C.L., Rochelle J.M., Blalock B.J., Binkley D.M., Wintenberg A.L., et al. Flicker noise behavior of MOSFETs fabricated in 0.5 μm fully depleted (FD) silicon-on-sapphire (SOS) CMOS in weak, moderate, and strong inversion. IEEE Trans Nucl Sci 50 (2003) 963-968
    • (2003) IEEE Trans Nucl Sci , vol.50 , pp. 963-968
    • Ericson, M.N.1    Britton Jr., C.L.2    Rochelle, J.M.3    Blalock, B.J.4    Binkley, D.M.5    Wintenberg, A.L.6
  • 81
    • 0035444844 scopus 로고    scopus 로고
    • Feasibility of 0.18 μm SOI CMOS technology using hybrid trench isolation with high resistivity substrate for embedded RF/analog applications
    • Maeda S., Wada Y., Yamamoto K., Komurasaki H., Matsumoto T., Hirano Y., et al. Feasibility of 0.18 μm SOI CMOS technology using hybrid trench isolation with high resistivity substrate for embedded RF/analog applications. IEEE Trans Electron Dev 48 (2001) 2065-2073
    • (2001) IEEE Trans Electron Dev , vol.48 , pp. 2065-2073
    • Maeda, S.1    Wada, Y.2    Yamamoto, K.3    Komurasaki, H.4    Matsumoto, T.5    Hirano, Y.6
  • 82
    • 0036890506 scopus 로고    scopus 로고
    • A study of noise in surface and buried channel SiGe MOSFETs with gate oxide grown by low temperature plasma anodization
    • Lukyanchikova N.B., Petrichuk M.V., Garbar N.P., Riley L.S., and Hall S. A study of noise in surface and buried channel SiGe MOSFETs with gate oxide grown by low temperature plasma anodization. Solid-State Electron 46 (2002) 2053-2061
    • (2002) Solid-State Electron , vol.46 , pp. 2053-2061
    • Lukyanchikova, N.B.1    Petrichuk, M.V.2    Garbar, N.P.3    Riley, L.S.4    Hall, S.5
  • 83
    • 0000658077 scopus 로고    scopus 로고
    • X-ray photoelectron spectroscopy of SiGe: implications for oxidation kinetics of SiGe
    • Riley L.S., and Hall S. X-ray photoelectron spectroscopy of SiGe: implications for oxidation kinetics of SiGe. J Appl Phys 85 (1999) 1-10
    • (1999) J Appl Phys , vol.85 , pp. 1-10
    • Riley, L.S.1    Hall, S.2
  • 84
    • 0036928402 scopus 로고    scopus 로고
    • Low-frequency noise characteristics in SiGe channel heterostructure dynamic threshold pMOSFET (HDTMOS)
    • The IEEE, New York
    • Asai A., Iwanaga J.S., Inoue A., Hara Y., Kanzawa Y., Sorada H., et al. Low-frequency noise characteristics in SiGe channel heterostructure dynamic threshold pMOSFET (HDTMOS). IEDM Tech Dig (2002), The IEEE, New York 35
    • (2002) IEDM Tech Dig , pp. 35
    • Asai, A.1    Iwanaga, J.S.2    Inoue, A.3    Hara, Y.4    Kanzawa, Y.5    Sorada, H.6
  • 85
    • 0142185859 scopus 로고    scopus 로고
    • Low frequency noise (LFN) characteristics of SiGe channel SOI dynamic threshold MOSFETs (SiGe-SOI-DTMOS) for low-power applications
    • The IEEE, New York
    • Inoue A., Asai A., Kawashima Y., Sorada H., Kanzawa Y., Kawashima T., et al. Low frequency noise (LFN) characteristics of SiGe channel SOI dynamic threshold MOSFETs (SiGe-SOI-DTMOS) for low-power applications. Proceedings IEEE international SOI conference (2003), The IEEE, New York 149
    • (2003) Proceedings IEEE international SOI conference , pp. 149
    • Inoue, A.1    Asai, A.2    Kawashima, Y.3    Sorada, H.4    Kanzawa, Y.5    Kawashima, T.6
  • 86
    • 0033339101 scopus 로고    scopus 로고
    • Low-frequency noise properties of dynamic-threshold (DT) MOSFET's
    • Hsu T.-L., Tang D.D.-L., and Gong J. Low-frequency noise properties of dynamic-threshold (DT) MOSFET's. IEEE Electron Dev Lett 20 (1999) 532-534
    • (1999) IEEE Electron Dev Lett , vol.20 , pp. 532-534
    • Hsu, T.-L.1    Tang, D.D.-L.2    Gong, J.3
  • 90
    • 0032317484 scopus 로고    scopus 로고
    • Effect of body-to-source bias on the analog characteristics of 0.35 μm partially depleted SOI CMOS for low-voltage low-power mixed-mode applications
    • The IEEE, New York
    • Babcock J.A., Francis P., Haggag H., Darmawan J., Lee T.-W., Lindorfer P., et al. Effect of body-to-source bias on the analog characteristics of 0.35 μm partially depleted SOI CMOS for low-voltage low-power mixed-mode applications. Proceedings 1998 IEEE international SOI conference (1998), The IEEE, New York 25
    • (1998) Proceedings 1998 IEEE international SOI conference , pp. 25
    • Babcock, J.A.1    Francis, P.2    Haggag, H.3    Darmawan, J.4    Lee, T.-W.5    Lindorfer, P.6
  • 91
    • 0036456292 scopus 로고    scopus 로고
    • A comparative approach of low frequency noise in 0.25 and 0.12 μm partially and fully depleted SOI nMOSFETs
    • The IEEE, New York
    • Dieudonné F., Haendler S., Jomaah J., and Balestra F. A comparative approach of low frequency noise in 0.25 and 0.12 μm partially and fully depleted SOI nMOSFETs. Proceedings 2002 IEEE international SOI Conference (2002), The IEEE, New York 105
    • (2002) Proceedings 2002 IEEE international SOI Conference , pp. 105
    • Dieudonné, F.1    Haendler, S.2    Jomaah, J.3    Balestra, F.4
  • 92
    • 0038079328 scopus 로고    scopus 로고
    • Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted nMOSFETs
    • Dieudonné F., Haendler S., Jomaah J., and Balestra F. Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted nMOSFETs. Solid-State Electron 47 (2003) 1213-1218
    • (2003) Solid-State Electron , vol.47 , pp. 1213-1218
    • Dieudonné, F.1    Haendler, S.2    Jomaah, J.3    Balestra, F.4
  • 93
    • 0037301827 scopus 로고    scopus 로고
    • Low frequency noise in 0.12 μm partially and fully depleted SOI technology
    • Dieudonné F., Haendler S., Jomaah J., and Balestra F. Low frequency noise in 0.12 μm partially and fully depleted SOI technology. Microelectron Reliab 43 (2003) 243-248
    • (2003) Microelectron Reliab , vol.43 , pp. 243-248
    • Dieudonné, F.1    Haendler, S.2    Jomaah, J.3    Balestra, F.4
  • 94
    • 1442311895 scopus 로고    scopus 로고
    • Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs
    • Dieudonné F., Haendler S., Jomaah J., and Balestra F. Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs. Solid-State Electron 48 (2004) 985-997
    • (2004) Solid-State Electron , vol.48 , pp. 985-997
    • Dieudonné, F.1    Haendler, S.2    Jomaah, J.3    Balestra, F.4
  • 95
    • 0030215177 scopus 로고    scopus 로고
    • Low-frequency noise characterization of n- and p-MOSFETs with ultrathin oxynitride gate films
    • Morfouli P., Ghibaudo G., Ouisse T., Vogel E., Hill W., Misra V., et al. Low-frequency noise characterization of n- and p-MOSFETs with ultrathin oxynitride gate films. IEEE Electron Dev Lett 17 (1996) 395-397
    • (1996) IEEE Electron Dev Lett , vol.17 , pp. 395-397
    • Morfouli, P.1    Ghibaudo, G.2    Ouisse, T.3    Vogel, E.4    Hill, W.5    Misra, V.6
  • 97
    • 84907687968 scopus 로고    scopus 로고
    • 1.7 noise in deep submicron partially depleted SOI transistors. In: Baccarani G, Gnani E, Rudan M, editor. Proceedings of ESSDERC 2002; 2002. p. 75.
  • 102
    • 0037253003 scopus 로고    scopus 로고
    • Low-frequency noise characteristics of ultrathin body p-MOSFETs with molybdenum gate
    • Lee J.-S., Ha D., Choi Y.-K., King T.-J., and Bokor J. Low-frequency noise characteristics of ultrathin body p-MOSFETs with molybdenum gate. IEEE Electron Dev Lett 24 (2003) 31-33
    • (2003) IEEE Electron Dev Lett , vol.24 , pp. 31-33
    • Lee, J.-S.1    Ha, D.2    Choi, Y.-K.3    King, T.-J.4    Bokor, J.5
  • 103
    • 0032256946 scopus 로고    scopus 로고
    • A study of flicker noise in n- and p-MOSFETs with ultra-thin gate oxide in the direct-tunneling regime
    • The IEEE, New York
    • Momose H.S., Kimijima H., Ishizuka S.-I., Miyahara Y., Ohguro T., Yoshitomi T., et al. A study of flicker noise in n- and p-MOSFETs with ultra-thin gate oxide in the direct-tunneling regime. IEDM Tech Dig (1998), The IEEE, New York 923
    • (1998) IEDM Tech Dig , pp. 923
    • Momose, H.S.1    Kimijima, H.2    Ishizuka, S.-I.3    Miyahara, Y.4    Ohguro, T.5    Yoshitomi, T.6
  • 104
    • 0035447846 scopus 로고    scopus 로고
    • Low-frequency noise degradation caused by STI interface effects in SOI-MOSFETs
    • Lee H., Lee J.-H., Shin H., Park Y.J., and Min H.S. Low-frequency noise degradation caused by STI interface effects in SOI-MOSFETs. IEEE Electron Dev Lett 22 (2001) 449-451
    • (2001) IEEE Electron Dev Lett , vol.22 , pp. 449-451
    • Lee, H.1    Lee, J.-H.2    Shin, H.3    Park, Y.J.4    Min, H.S.5
  • 105
    • 0036539777 scopus 로고    scopus 로고
    • An anomalous device degradation of SOI narrow width devices caused by STI edge influence
    • Lee H., Lee J.-H., Shin H., Park Y.-J., and Min H.S. An anomalous device degradation of SOI narrow width devices caused by STI edge influence. IEEE Trans Electron Dev 49 (2002) 605-612
    • (2002) IEEE Trans Electron Dev , vol.49 , pp. 605-612
    • Lee, H.1    Lee, J.-H.2    Shin, H.3    Park, Y.-J.4    Min, H.S.5
  • 106
    • 0034471225 scopus 로고    scopus 로고
    • Sub-micron fully depleted lateral asymmetric channel SOI MOSFETs for analog and mixed mode applications
    • The IEEE, New York
    • Deshpande H.V., Cheng B., and Woo J.C.S. Sub-micron fully depleted lateral asymmetric channel SOI MOSFETs for analog and mixed mode applications. Proceedings of the 2000 IEEE international SOI conference (2000), The IEEE, New York 54
    • (2000) Proceedings of the 2000 IEEE international SOI conference , pp. 54
    • Deshpande, H.V.1    Cheng, B.2    Woo, J.C.S.3
  • 107
    • 0033736623 scopus 로고    scopus 로고
    • Graded-channel fully depleted silicon-on-insulator nMOSFET for reducing the parasitic bipolar effects
    • Pavanello M.A., Martino J.A., and Flandre D. Graded-channel fully depleted silicon-on-insulator nMOSFET for reducing the parasitic bipolar effects. Solid-State Electron 44 (2000) 917
    • (2000) Solid-State Electron , vol.44 , pp. 917
    • Pavanello, M.A.1    Martino, J.A.2    Flandre, D.3
  • 108
    • 0033751937 scopus 로고    scopus 로고
    • Analog performance and application of graded-channel fully depleted SOI MOSFETs
    • Pavanello M.A., Martino J.A., and Flandre D. Analog performance and application of graded-channel fully depleted SOI MOSFETs. Solid-State Electron 44 (2000) 1219
    • (2000) Solid-State Electron , vol.44 , pp. 1219
    • Pavanello, M.A.1    Martino, J.A.2    Flandre, D.3
  • 109
    • 1442287310 scopus 로고    scopus 로고
    • Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications
    • Kranti A., Chung T.M., Flandre D., and Raskin J.-P. Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications. Solid-State Electron 48 (2004) 947
    • (2004) Solid-State Electron , vol.48 , pp. 947
    • Kranti, A.1    Chung, T.M.2    Flandre, D.3    Raskin, J.-P.4
  • 111
    • 33846649781 scopus 로고    scopus 로고
    • Simoen E, Claeys C, Chung TM, Flandre D, Raskin J-P. The low-frequency noise behavior of graded-channel SOI nMOSFETs. In: Abstracts of the EUROSOI Workshop, Grenoble, France, 8-10 March; 2006. p. 105.
  • 112
    • 33847274701 scopus 로고    scopus 로고
    • Simoen E, Claeys C, Chung TM, Pavanello MA, Martino JA, Flandre D, et al. The low-frequency noise behaviour of graded-channel SOI nMOSFETs. Solid-State Electron, in press, doi:10.1016/j.sse.2007.01.003.
  • 113
    • 0023421993 scopus 로고
    • Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance
    • Balestra F., Cristoloveanu S., Benachir M., Brini J., and Elewa T. Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance. IEEE Electron Dev Lett 8 (1987) 410-412
    • (1987) IEEE Electron Dev Lett , vol.8 , pp. 410-412
    • Balestra, F.1    Cristoloveanu, S.2    Benachir, M.3    Brini, J.4    Elewa, T.5
  • 114
    • 0024918341 scopus 로고
    • A fully depleted lean-channel transistor (DELTA) - A novel vertical ultra thin SOI MOSFET
    • The IEEE, New York
    • Hasimoto D., Kaga T., Kawamoto Y., and Takeda E. A fully depleted lean-channel transistor (DELTA) - A novel vertical ultra thin SOI MOSFET. IEDM Tech Dig (1989), The IEEE, New York 833
    • (1989) IEDM Tech Dig , pp. 833
    • Hasimoto, D.1    Kaga, T.2    Kawamoto, Y.3    Takeda, E.4
  • 115
    • 0026763758 scopus 로고
    • Dual-gate operation and volume inversion in n-channel SOI MOSFET's
    • Venkatesan S., Neudeck G.W., and Pierret R.F. Dual-gate operation and volume inversion in n-channel SOI MOSFET's. IEEE Electron Dev Lett 13 (1992) 44-46
    • (1992) IEEE Electron Dev Lett , vol.13 , pp. 44-46
    • Venkatesan, S.1    Neudeck, G.W.2    Pierret, R.F.3
  • 117
    • 0027697881 scopus 로고
    • A low-frequency noise study of gate-all-around SOI transistors
    • Simoen E., Magnusson U., and Claeys C. A low-frequency noise study of gate-all-around SOI transistors. IEEE Trans Electron Dev 40 (1993) 2054-2059
    • (1993) IEEE Trans Electron Dev , vol.40 , pp. 2054-2059
    • Simoen, E.1    Magnusson, U.2    Claeys, C.3
  • 118
    • 0029209376 scopus 로고
    • D.C. and low frequency noise characteristics of γ-irradiated gate-all-around silicon-on-insulator MOS transistors
    • Simoen E., Claeys C., Coenen S., and Decreton M. D.C. and low frequency noise characteristics of γ-irradiated gate-all-around silicon-on-insulator MOS transistors. Solid-State Electron 38 (1995) 1-8
    • (1995) Solid-State Electron , vol.38 , pp. 1-8
    • Simoen, E.1    Claeys, C.2    Coenen, S.3    Decreton, M.4
  • 119
    • 0035714369 scopus 로고    scopus 로고
    • High-performance symmetric-gate and CMOS-compatible Vt asymmetric FinFET devices
    • The IEEE, New York
    • Kedzierski J., Fried D.M., Nowak E.J., Kanarsky T., Rankin J.H., Hanafi H., et al. High-performance symmetric-gate and CMOS-compatible Vt asymmetric FinFET devices. IEDM Tech Dig (2001), The IEEE, New York 437
    • (2001) IEDM Tech Dig , pp. 437
    • Kedzierski, J.1    Fried, D.M.2    Nowak, E.J.3    Kanarsky, T.4    Rankin, J.H.5    Hanafi, H.6
  • 120
    • 0036163060 scopus 로고    scopus 로고
    • Nanoscale CMOS spacer FinFET for the terabit era
    • Choi Y.-K., King T.-J., and Hu C. Nanoscale CMOS spacer FinFET for the terabit era. IEEE Electron Dev Lett 23 (2002) 25-27
    • (2002) IEEE Electron Dev Lett , vol.23 , pp. 25-27
    • Choi, Y.-K.1    King, T.-J.2    Hu, C.3
  • 124
    • 33846573973 scopus 로고    scopus 로고
    • Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs
    • The IEEE, New York
    • Subramanian V., Parvais B., Borremans J., Mercha A., Linten D., Wambacq P., et al. Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs. IEDM Tech Dig (2005), The IEEE, New York 898
    • (2005) IEDM Tech Dig , pp. 898
    • Subramanian, V.1    Parvais, B.2    Borremans, J.3    Mercha, A.4    Linten, D.5    Wambacq, P.6
  • 125
    • 33846575834 scopus 로고    scopus 로고
    • Subramanian V, Mercha A, Parvais B, Loo J, Gustin C, Dehan M, et al. Optimization of FinFET geometries for analog performance. In: Proceedings of ULIS 2006 -seventh international conference on ultimate integration of silicon, Grenoble; 2006. p. 21.
  • 127
    • 33751416106 scopus 로고    scopus 로고
    • 4-FET depletion-all-around operation. In: Proceedings of ESSDERC; 2005. p. 89.
  • 129
    • 0030388126 scopus 로고    scopus 로고
    • Low-frequency noise dependence of TFSOI BiCMOS for low power RF mixed-mode applications
    • The IEEE, New York
    • Babcock J.A., Huang W.M., Ford J.M., Ngo D., Spooner D.J., and Cheng S. Low-frequency noise dependence of TFSOI BiCMOS for low power RF mixed-mode applications. IEDM Tech Dig (1996), The IEEE, New York 133
    • (1996) IEDM Tech Dig , pp. 133
    • Babcock, J.A.1    Huang, W.M.2    Ford, J.M.3    Ngo, D.4    Spooner, D.J.5    Cheng, S.6
  • 130
    • 0034822327 scopus 로고    scopus 로고
    • Babcock JA, Loftin B, Madhani P, Chen X, Pinto A, Schroder DK. Comparative low frequency noise analysis of bipolar and MOS transistors using an advanced complementary BiCMOS technology. In: Proceedings of IEEE 2001 custom integrated circuits conference; 2001. p. 385.
  • 133
    • 33749474417 scopus 로고    scopus 로고
    • Low-frequency noise in SOI SiGe HBTs made by selective growth of the Si collector and non-selective growth of SiGe base
    • González T., Mateos J., and Pardo D. (Eds), American Institute of Physics
    • Lukyanchikova N., Garbar N., Smolanka A., Lokshin M., Hall S., Buiu O., et al. Low-frequency noise in SOI SiGe HBTs made by selective growth of the Si collector and non-selective growth of SiGe base. In: González T., Mateos J., and Pardo D. (Eds). Proceedings 18th international conference on noise and fluctuations - ICNF 2005 (2005), American Institute of Physics 265
    • (2005) Proceedings 18th international conference on noise and fluctuations - ICNF 2005 , pp. 265
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Lokshin, M.4    Hall, S.5    Buiu, O.6
  • 134
    • 33845208227 scopus 로고    scopus 로고
    • The base current and related 1/f noise for SiGe HBTs realized by SEG/NSEG technology on SOI and bulk substrates
    • Lukyanchikova N., Garbar N., Smolanka A., Lokshin M., Hall S., Buiu O., et al. The base current and related 1/f noise for SiGe HBTs realized by SEG/NSEG technology on SOI and bulk substrates. Mat Sci Semicond Proc 9 (2006) 727-731
    • (2006) Mat Sci Semicond Proc , vol.9 , pp. 727-731
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Lokshin, M.4    Hall, S.5    Buiu, O.6
  • 135
    • 0032276256 scopus 로고    scopus 로고
    • Device design methodology to optimize low-frequency noise in advanced SOI CMOS technology for RF IC's
    • The IEEE, New York
    • Tseng Y.-C., Huang W.M., Mendicino M., Ngo D., Ilderem V., and Woo J.C.S. Device design methodology to optimize low-frequency noise in advanced SOI CMOS technology for RF IC's. IEDM Tech Dig (1998), The IEEE, New York 949
    • (1998) IEDM Tech Dig , pp. 949
    • Tseng, Y.-C.1    Huang, W.M.2    Mendicino, M.3    Ngo, D.4    Ilderem, V.5    Woo, J.C.S.6
  • 136
    • 0002082142 scopus 로고    scopus 로고
    • Phase noise characteristics associated with low-frequency noise in submicron SOI MOSFET feedback oscillator for RF IC's
    • Tseng Y.-C., Huang W.M., Spears E., Spooner D., Ngo D., Ford J.M., et al. Phase noise characteristics associated with low-frequency noise in submicron SOI MOSFET feedback oscillator for RF IC's. IEEE Electron Dev Lett 20 (1999) 54-56
    • (1999) IEEE Electron Dev Lett , vol.20 , pp. 54-56
    • Tseng, Y.-C.1    Huang, W.M.2    Spears, E.3    Spooner, D.4    Ngo, D.5    Ford, J.M.6
  • 137
    • 0029406037 scopus 로고
    • Comparative study of fully depleted and body-grounded non-fully depleted SOI MOSFET's for high performance analog and mixed signal circuits
    • Chan M., Yu B., Ma Z.-J., Nguyen C.T., Hu C., and Ko P.K. Comparative study of fully depleted and body-grounded non-fully depleted SOI MOSFET's for high performance analog and mixed signal circuits. IEEE Trans Electron Dev 42 (1995) 1975-1981
    • (1995) IEEE Trans Electron Dev , vol.42 , pp. 1975-1981
    • Chan, M.1    Yu, B.2    Ma, Z.-J.3    Nguyen, C.T.4    Hu, C.5    Ko, P.K.6
  • 138
    • 0036509083 scopus 로고    scopus 로고
    • Time-varying body instability and low-frequency noise characteristics of mini-field-dual-body silicon-on-insulator structure for analog-digital mixed-mode circuits
    • Lee H., Lee J.-H., Park Y.J., and Min H.S. Time-varying body instability and low-frequency noise characteristics of mini-field-dual-body silicon-on-insulator structure for analog-digital mixed-mode circuits. Jpn J Appl Phys 41 (2002) 1279-1283
    • (2002) Jpn J Appl Phys , vol.41 , pp. 1279-1283
    • Lee, H.1    Lee, J.-H.2    Park, Y.J.3    Min, H.S.4
  • 139
    • 33846607494 scopus 로고    scopus 로고
    • Zafari L, Jomaah J, Ghibaudo G. Floating body effects in 90 nm partially depleted MOSFETs. In: Proceedings of ULIS 2006 - seventh international conference on ultimate integration of silicon, Grenoble; 2006. p. 157.
  • 140
    • 0034470989 scopus 로고    scopus 로고
    • Comparative low frequency noise analysis in various SOI devices: Floating body, body-tied, DTMOS with and without current limiter
    • The IEEE, New York
    • Haendler S., Jomaah J., Balestra F., and Pelloie J.L. Comparative low frequency noise analysis in various SOI devices: Floating body, body-tied, DTMOS with and without current limiter. 2000 IEEE international SOI conference (2000), The IEEE, New York 126
    • (2000) 2000 IEEE international SOI conference , pp. 126
    • Haendler, S.1    Jomaah, J.2    Balestra, F.3    Pelloie, J.L.4
  • 141
    • 0003640512 scopus 로고    scopus 로고
    • Haendler S, Jomaah J, Balestra F, Pelloie JL. On the noise in dynamic threshold (DT) MOS/SOI transistors. In: Proceedings of ESSDERC; 2000. p. 504-7.
  • 142
    • 0035366684 scopus 로고    scopus 로고
    • Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors
    • Haendler S., Jomaah J., Ghibaudo G., and Balestra F. Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors. Microelectron Reliab 41 (2001) 855-860
    • (2001) Microelectron Reliab , vol.41 , pp. 855-860
    • Haendler, S.1    Jomaah, J.2    Ghibaudo, G.3    Balestra, F.4
  • 143
    • 0026854177 scopus 로고
    • Twin-MOSFET structure for suppression of kink and parasitic bipolar effects in SOI MOSFET's at room and liquid helium temperatures
    • Gao M.-H., Colinge J.-P., Lauwers L., Wu S., and Claeys C. Twin-MOSFET structure for suppression of kink and parasitic bipolar effects in SOI MOSFET's at room and liquid helium temperatures. Solid-State Electron 35 (1992) 505-512
    • (1992) Solid-State Electron , vol.35 , pp. 505-512
    • Gao, M.-H.1    Colinge, J.-P.2    Lauwers, L.3    Wu, S.4    Claeys, C.5
  • 144
    • 0028550662 scopus 로고
    • The low-frequency noise overshoot in partially depleted n-channel silicon-on-insulator twin-MOSTs
    • Simoen E., Smeys P.I.L., and Claeys C. The low-frequency noise overshoot in partially depleted n-channel silicon-on-insulator twin-MOSTs. IEEE Trans Electron Dev 41 (1994) 1972-1977
    • (1994) IEEE Trans Electron Dev , vol.41 , pp. 1972-1977
    • Simoen, E.1    Smeys, P.I.L.2    Claeys, C.3
  • 145
    • 33846633893 scopus 로고    scopus 로고
    • Simoen E, Claeys C, Lukyanchikova N, Garbar N, Smolanka A. Electron valence-band tunnelling excess noise in twin-gate silicon-on-insulator MOSFETs. In: Proceedings of ULIS 2006 - sixth international conference on ultimate integration of silicon; 2006. p. 113.
  • 146
    • 22944479623 scopus 로고    scopus 로고
    • Linear-kink-noise suppression in partially depleted SOI using the twin-gate MOSFET configuration
    • Simoen E., Claeys C., Lukyanchikova N., Garbar N., and Smolanka A. Linear-kink-noise suppression in partially depleted SOI using the twin-gate MOSFET configuration. IEEE Electron Dev Lett 26 (2005) 510-512
    • (2005) IEEE Electron Dev Lett , vol.26 , pp. 510-512
    • Simoen, E.1    Claeys, C.2    Lukyanchikova, N.3    Garbar, N.4    Smolanka, A.5
  • 148
    • 33746861172 scopus 로고    scopus 로고
    • Impact of the twin-gate structure on the linear kink effect in PD SOI nMOSFETs
    • Ghedini Der Agopian P., Martino J.A., Simoen E., and Claeys C. Impact of the twin-gate structure on the linear kink effect in PD SOI nMOSFETs. Microelectron J 37 (2006) 681-685
    • (2006) Microelectron J , vol.37 , pp. 681-685
    • Ghedini Der Agopian, P.1    Martino, J.A.2    Simoen, E.3    Claeys, C.4
  • 149
    • 33846627042 scopus 로고    scopus 로고
    • Analytical model for the impact of the twin-gate on the floating-body-related low-frequency noise overshoot in silicon-on-insulator MOSFETs
    • Lukyanchikova N., Garbar N., Smolanka A., Kudina V., Claeys C., and Simoen E. Analytical model for the impact of the twin-gate on the floating-body-related low-frequency noise overshoot in silicon-on-insulator MOSFETs. IEEE Trans Electron Dev 53 (2006) 3118-3128
    • (2006) IEEE Trans Electron Dev , vol.53 , pp. 3118-3128
    • Lukyanchikova, N.1    Garbar, N.2    Smolanka, A.3    Kudina, V.4    Claeys, C.5    Simoen, E.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.