-
1
-
-
0035446820
-
Nanoscale ultrathin body PMOSFET's with raised selective germanium source/drain
-
Sept.
-
Y.-K. Choi, D. Ha, T.-J. King, and C. Hu, "Nanoscale ultrathin body PMOSFET's with raised selective germanium source/drain," IEEE Electron Device Lett., vol. 22, pp. 447-448, Sept. 2001.
-
(2001)
IEEE Electron Device Lett.
, vol.22
, pp. 447-448
-
-
Choi, Y.-K.1
Ha, D.2
King, T.-J.3
Hu, C.4
-
2
-
-
0035340554
-
Sub-50 nm p-channel finFET
-
May
-
X, Huang, W.-C. Lee, C. Kuo, C. Hisamoto, L. Chang, L. Kedzierski, E. Anderson, H. Takeuchi, Y.-K. Choi, K. Asano, V. Suramanian, T.-J. King, J. Bokor, and C. Hu, "Sub-50 nm p-channel finFET," IEEE Trans. Electron Devices, vol. 48, pp. 880-886, May 2001.
-
(2001)
IEEE Trans. Electron Devices
, vol.48
, pp. 880-886
-
-
Huang, X.1
Lee, W.-C.2
Kuo, C.3
Hisamoto, C.4
Chang, L.5
Kedzierski, L.6
Anderson, E.7
Takeuchi, H.8
Choi, Y.-K.9
Asano, K.10
Suramanian, V.11
King, T.-J.12
Bokor, J.13
Hu, C.14
-
3
-
-
0033750493
-
Ultrathin-body SOI MOSFET for deep-sub-tenth micron era
-
May
-
Y.-K. Choi, K. Asano, N. Lindert, V. Subramanian, T.-J. King, J. Bokor, and C. Hu, "ultrathin-body SOI MOSFET for deep-sub-tenth micron era," IEEE Electron Device Lett., vol. 21, pp. 254-255, May 2000.
-
(2000)
IEEE Electron Device Lett.
, vol.21
, pp. 254-255
-
-
Choi, Y.-K.1
Asano, K.2
Lindert, N.3
Subramanian, V.4
King, T.-J.5
Bokor, J.6
Hu, C.7
-
4
-
-
0034453428
-
Gate length scaling and threshold voltage control of double-gate MOSFET's
-
L. Chang, S. Tang, T.-J. King, J. Bokor, and C. Hu, "Gate length scaling and threshold voltage control of double-gate MOSFET's," in IEDM Tech. Dig., 2000, pp. 719-722.
-
(2000)
IEDM Tech. Dig.
, pp. 719-722
-
-
Chang, L.1
Tang, S.2
King, T.-J.3
Bokor, J.4
Hu, C.5
-
5
-
-
0033700304
-
Dual-metal gate technology for deep-submicron CMOS transistors
-
Q. Lu, Y.-C. Yeo, P. Ranade, H. Takeuchi, T.-J. King, C. Hu, S. C. Song, H. F. Luan, and D. L. Kwong, "Dual-metal gate technology for deep-submicron CMOS transistors," in Proc. Symp. VLSI Tech., 2000, pp. 72-73.
-
Proc. Symp. VLSI Tech., 2000
, pp. 72-73
-
-
Lu, Q.1
Yeo, Y.-C.2
Ranade, P.3
Takeuchi, H.4
King, T.-J.5
Hu, C.6
Song, S.C.7
Luan, H.F.8
Kwong, D.L.9
-
6
-
-
0035337187
-
Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectrics
-
May
-
Y. C. Yeo, Q. Lu, P. Ranade, H. Takeuchi, K. J. Yang, I. Polishchuk, T. King, C. Hu, S. C. Song, H. F. Luan, and D. L. Kwong, "Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectrics," IEEE Electron Device Lett., vol. 22, pp. 227-229, May 2001.
-
(2001)
IEEE Electron Device Lett.
, vol.22
, pp. 227-229
-
-
Yeo, Y.C.1
Lu, Q.2
Ranade, P.3
Takeuchi, H.4
Yang, K.J.5
Polishchuk, I.6
King, T.7
Hu, C.8
Song, S.C.9
Luan, H.F.10
Kwong, D.L.11
-
7
-
-
0003216222
-
Molybdenum gate electrode technology for deep sub-micron CMOS generation
-
Nov.
-
P. Ranade, H. Takeuchi, T.-J. King, and C. Hu, "Molybdenum gate electrode technology for deep sub-micron CMOS generation," Electrochem. Solid-State Lett., Nov. 2001.
-
(2001)
Electrochem. Solid-State Lett.
-
-
Ranade, P.1
Takeuchi, H.2
King, T.-J.3
Hu, C.4
-
8
-
-
0036945511
-
+ ion implantation for the work function control
-
+ ion implantation for the work function control," in Proc. Mater. Res. Soc. Spring Meeting, Symp. B: Silicon Materials - Process., Characterization, Reliab., San Francisco, CA, Apr. 2002.
-
Proc. Mater. Res. Soc. Spring Meeting, Symp. B: Silicon Materials - Process., Characterization, Reliab., San Francisco, CA, Apr. 2002
-
-
Amada, T.1
Maeda, N.2
Shibahara, K.3
-
9
-
-
0026144142
-
Improved analysis of low frequency noise in field-effect MOS transistors
-
G. Ghibaudo, O. Roux, C. Nguyen-duc, F. Balestra, and J. Brini, "Improved analysis of low frequency noise in field-effect MOS transistors," Phys. Stat. Sol (a), vol. 124, pp. 571-581, 1991.
-
(1991)
Phys. Stat. Sol (A)
, vol.124
, pp. 571-581
-
-
Ghibaudo, G.1
Roux, O.2
Nguyen-Duc, C.3
Balestra, F.4
Brini, J.5
-
10
-
-
0025398785
-
A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors
-
Mar.
-
K. K. Hung, P. K. Ko, C. Hu, and Y. C. Cheng, "A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors," IEEE Trans. Electron Devices, vol. 37, pp. 654-665, Mar. 1990.
-
(1990)
IEEE Trans. Electron Devices
, vol.37
, pp. 654-665
-
-
Hung, K.K.1
Ko, P.K.2
Hu, C.3
Cheng, Y.C.4
-
11
-
-
0036133489
-
Static and low frequency noise characterization of surface- and buried-mode 0.1 mm P and NMOSFET's
-
M. Fadlallah, G. Ghibaudo, J. Jomaah, M. Zoaeter, and G. Guegan, "Static and low frequency noise characterization of surface- and buried-mode 0.1 mm P and NMOSFET's," Microelectron. Reliab., vol. 42, pp. 41-46, 2002.
-
(2002)
Microelectron. Reliab.
, vol.42
, pp. 41-46
-
-
Fadlallah, M.1
Ghibaudo, G.2
Jomaah, J.3
Zoaeter, M.4
Guegan, G.5
-
12
-
-
0033280525
-
Work function controlled metal gate electrode on ultrathin gate insulators
-
K. Nakajima, Y. Akasaka, M. Kaneko, M. Tamaoki, and Y. Yamada, "Work function controlled metal gate electrode on ultrathin gate insulators," in Proc. Symp. VLSI Tech., 1999, pp. 95-96.
-
Proc. Symp. VLSI Tech., 1999
, pp. 95-96
-
-
Nakajima, K.1
Akasaka, Y.2
Kaneko, M.3
Tamaoki, M.4
Yamada, Y.5
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