|
Volumn , Issue , 2003, Pages 975-977
|
Mixed-signal performance of Sub-100nm fully-depleted SOI devices with metal gate, high K (HfO 2) dielectric and elevated Source/Drain extensions
a a a a a a a a a b a a a a a a a a a a more.. |
Author keywords
[No Author keywords available]
|
Indexed keywords
DEPLETION EFFECTS;
GATE LEAKAGE;
TRANSISTOR MISMATCH;
CAPACITANCE;
CMOS INTEGRATED CIRCUITS;
DIELECTRIC MATERIALS;
DIGITAL CIRCUITS;
ELECTRIC CONDUCTIVITY;
ELECTRODES;
ETCHING;
GATES (TRANSISTOR);
MOSFET DEVICES;
OXIDATION;
POLYSILICON;
SEMICONDUCTOR DOPING;
SIGNAL TO NOISE RATIO;
SILICON WAFERS;
SPURIOUS SIGNAL NOISE;
TRANSMISSION ELECTRON MICROSCOPY;
SILICON ON INSULATOR TECHNOLOGY;
|
EID: 17644439241
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (20)
|
References (4)
|