Reliability comparison of triple-gate versus planar SOI FETs

IEEE Transactions on Electron Devices

Volumn 53, Issue 9, 2006, Pages 2351-2356

  Crupi, Felice ^b   Kaczer, Ben ^c   Degraeve, Robin ^c   Subramanian, Vaidy ^c,d   Srinivasan, Purushothaman ^a,c   Simoen, Eddy ^c   Dixit, Abhisek ^c,d   Jurczak, Malgorzata ^c   Groeseneken, Guido ^a,c,d  

^a IEEE

^b UNIVERSITY OF CALABRIA   (Italy)

^c IMEC   (Belgium)

^d Katholieke Universiteit Leuven   (Belgium)

Author keywords

CMOS reliability; Dielectrics breakdown (BD); Silicon on insulator (SOI); Triple gate MOSFET

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; RELIABILITY; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; WEIBULL DISTRIBUTION;

CMOS RELIABILITY; LOW FREQUENCY NOISE; TRIPLE-GATE MOSFET DEVICES;

FIELD EFFECT TRANSISTORS;

EID: 33846625337     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.880824     Document Type: Article

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