Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors

Microelectronics Reliability

Volumn 41, Issue 6, 2001, Pages 855-860

  Haendler, S ^a   Jomaah, J ^a   Ghibaudo, G ^a   Balestra, F ^a  

^a Grenoble INP Phelma   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; SPURIOUS SIGNAL NOISE; SUBSTRATES;

LOW FREQUENCY NOISE (LFN);

MOSFET DEVICES;

EID: 0035366684     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00021-X     Document Type: Article

References (15)

1. Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI
2. Comparative analysis of SOI floating-body and DTMOS with bulk devices for 1 V Operation
3. Detailed analysis of short-channel SOI DT-MOSFET
4. max Enhancement of dynamic-threshold voltage MOSFET (DTMOS) under ultralow supply voltage
5. Low-frequency noise properties of dynamic-threshold (DT) MOSFET's
6. Impact of latch phenomenon on low frequency noise in SOI MOSFETs
7. Improved analysis of low frequency noise in field-effect MOS transistors
8. Low-frequency noise in MOS transistors
9. A simple derivation of drain reimbold's drain current spectrum formula for flicker noise in MOSFETS
10. The kink-related excess low-frequency noise in silicon-on insulator MOST's
11. Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's
12. Thorough investigation of kink-related excess noise in deep-submicron SOI N-MOSFETs on unibond substrate
13. A small-signal model for the frequency-dependent drain admittance in floating-substrate MOSFET's