Linear-kink-noise suppression in partially depleted SOI using the twin-gate MOSFET configuration

IEEE Electron Device Letters

Volumn 26, Issue 7, 2005, Pages 510-512

  Simoen, E ^a   Claeys, C ^a   Lukyanchikova, N ^b   Garbar, N ^b   Smolanka, A ^b  

^a IMEC   (Belgium)

^b INSTITUTE OF SEMICONDUCTOR PHYSICS   (Ukraine)

Author keywords

Lorentzian noise; Low frequency noise; Partially depleted (PD) silicon on insulator (SOI); Twin gate (TG) configuration

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); HOLE TRAPS; IMPACT IONIZATION; MOSFET DEVICES; POLYSILICON; SEMICONDUCTING FILMS; SEMICONDUCTOR DEVICE STRUCTURES; SPURIOUS SIGNAL NOISE;

BODY-EFFECT FACTOR; LINEAR-KINK-NOISE SUPPRESSION; LORENTZIAN NOISE; LOW-FREQUENCY NOISE; PARTIALLY DEPLETED (PD) SILICON-ON-INSULATOR (SOI); TWIN-GATE (TG) CONFIGURATION;

SILICON ON INSULATOR TECHNOLOGY;

EID: 22944479623     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.851178     Document Type: Article

References (12)

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