Effect of starting SOI material quality on low-frequency noise characteristics in partially depleted floating-body SOI MOSFETs

IEEE Electron Device Letters

Volumn 21, Issue 12, 2000, Pages 610-612

  Ushiki, Takeo ^a,b   Ishino, Hideaki ^a   Ohmi, Tadahiro ^a  

^a TOHOKU UNIVERSITY   (Japan)

^b NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHEMICAL BONDS; ELECTRIC CHARGE; SEMICONDUCTOR JUNCTIONS; SILICON WAFERS; SPURIOUS SIGNAL NOISE; VARIABLE FREQUENCY OSCILLATORS;

FLOATING-BODY EFFECT;

MOSFET DEVICES;

EID: 0034510221     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.887482     Document Type: Article

References (10)

1. A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators," IEEE J. Solid-State Circuits, vol. 33, pp. 179-194, Feb. 1998.
2. M. Canada et al., "A 580 MHz RISC Microprocessor in SOI," in ISSCC Dig. Tech. Papers, 1999, pp. 430-431.
3. D. Eggert et al., "A SOI-RF-CMOS technology on high resistivity SIMOX substrates for microwave applications to 5 GHz," IEEE Trans. Electron Devices, vol. 44, pp. 1981-1989, Nov. 1997.
4. W. Jin, P. C. H. Chan, S. K. H. Fung, and P. K. Ko, "Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's," IEEE Trans. Electron Devices, vol. 46, pp. 1180-1185, June 1999.
5. Y.-C. Tseng et al., "AC floating body effects and the resultant analog circuit issues in submicron floating body and body-grounded SOI MOSFET's," IEEE Trans. Electron Devices, vol. 46, pp. 1685-1692, Aug. 1999.
6. Y.-C. Tseng, W. M. Huang, V. Ilderem, and J. C. S. Woo, "Floating body induced pre-kink excess low-frequency noise in submicron SOI CMOSFET technology," IEEE Electron Device Lett., vol. 20, pp. 484-486, 1999.
7. T. Yonehara, K. Sakaguchi, and N. Sato, "Epitaxial layer transfer by bond and etch back of porous Si," Appl. Phys. Lett., vol. 64, pp. 2108-2110, 1994.
8. M. Bruel, "Silicon on insulator material technology," Electron Lett., vol. 31, pp. 1201-1202, 1995.
9. R. Jayaraman and C. G. Sodini, "A 1/f noise technique to extract the oxide trap density near the conduction band edge of silicon," IEEE Trans. Electron Devices, vol. 36, pp. 1773-1782, Sept. 1989.
10. E. Simoen and C. L. Claeys, "On the geometry dependence of the 1/f noise in CMOS compatible junction diodes," IEEE Trans. Electron Devices, vol. 46, pp. 1725-1732, Aug. 1999.