Electron valence-band tunnelling excess noise in twin-gate silicon-on-insulator MOSFETs

Solid-State Electronics

Volumn 50, Issue 1, 2006, Pages 52-57

  Simoen, E ^a   Claeys, C ^a,b   Lukyanchikova, N ^c   Garbar, N ^c   Smolanka, A ^c   Der Agopian, P Ghedini ^d   Martino, J A ^d,e  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c INSTITUTE OF SEMICONDUCTOR PHYSICS   (Ukraine)

^d UNIVERSITY OF SÃO PAULO   (Brazil)

^e CENTRO UNIVERSITÁRIO DA FEI   (Brazil)

Author keywords

Floating body effects; Low frequency noise; Partially depleted SOI; Twin gate

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRON TUNNELING; MOSFET DEVICES; NUMERICAL ANALYSIS; SPURIOUS SIGNAL NOISE;

FLOATING BODY EFFECTS; LOW-FREQUENCY; PARTIALLY DEPLETED SOI; TWIN-GATE;

GATES (TRANSISTOR);

EID: 30344457063     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2005.10.038     Document Type: Conference Paper

References (18)

1. V. Dessard, B. Iñíguez, S. Adriaensen, and D. Flandre SOI n-MOSFET low-frequency noise measurements and modelling from room temperature up to 250 °C IEEE Trans Electron Dev 49 2002 1289 1295
2. Pretet J, Matsumoto T, Poiroux T, Cristoloveanu S, Gwoziecki R, Raynaud C, et al. New mechanism of body charging in partially depleted SOI-MOSFETs with ultra-thin gate oxides. In: Baccarani G, Gnani E, Rudan M, editors. In: Proceedings ESSDERC 2002, The University of Bologna, Italy, 2002. p. 515-8.
3. A. Mercha, J.M. Rafí, E. Augendre, E. Simoen, and C. Claeys Linear Kink Effect induced by valence band electron tunneling in ultra-thin gate oxide bulk and SOI MOSFETs IEEE Trans Electron Dev 50 2003 1675 1682
4. E. Simoen, U. Magnusson, A.L.P. Rotondaro, and C. Claeys The kink-related low-frequency noise in silicon-on-insulator MOSTs IEEE Trans Electron Dev 41 1994 330 339
5. F. Dieudonné, J. Jomaah, and F. Balestra Gate-induced floating body effect excess noise in partially depleted SOI MOSFETs IEEE Electron Dev Lett 23 2002 737 739
6. A. Mercha, E. Simoen, H. van Meer, and C. Claeys Low-frequency noise overshoot in ultrathin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors Appl Phys Lett 82 2003 1790 1792
7. N.B. Lukyanchikova, M.V. Petrichuk, N. Garbar, A. Mercha, E. Simoen, and C. Claeys Electron valence-band tunnelling-induced Lorentzian noise in deep submicron silicon-on-insulator metal-oxide-semiconductor field-effect transistors J Appl Phys 94 2003 4461 4469
8. M.-H. Gao, J.-P. Colinge, L. Lauwers, S. Wu, and C. Claeys Twin-MOSFET structure for suppression of kink and parasitic bipolar effects in SOI MOSFETs at room and liquid helium temperatures Solid-State Electron 35 1992 505 512
9. E. Simoen, P.I.L. Smeys, and C. Claeys The low-frequency noise overshoot in partially depleted n-channel silicon-on-insulator twin-MOSTs IEEE Trans Electron Dev 41 1994 1972 1976
10. E. Simoen, and C. Claeys The low-frequency noise behaviour of silicon-on-insulator technologies Solid-State Electron 39 1996 949 960
11. ATLAS User's Manual, SILVACO, 2004.
12. E. Simoen, A. Mercha, J.M. Rafí, C. Claeys, N.B. Lukyanchikova, and N. Garbar Explaining the parameters of the electron valence-band tunnelling related Lorentzian noise in fully depleted SOI MOSFETs IEEE Electron Dev Lett 24 2003 751 754
13. N. Lukyanchikova, N. Garbar, A. Smolanka, E. Simoen, A. Mercha, and C. Claeys Short-channel effects in the Lorentzian noise induced by the EVB tunnelling in partially-depleted SOI MOSFETs Solid-State Electron 48 2004 747 758
14. R. Rios, W.-K. Shih, A. Shah, S. Mudanai, P. Packan, and T. Sandford A three-transistor threshold voltage model for halo processes IEDM Tech Dig 2002 113 116
15. E. Simoen, A. Mercha, J.M. Rafí, C. Claeys, N. Lukyanchikova, and N. Garbar High-energy proton irradiation induced changes in the linear-kink noise overshoot in 0.10 μm partially depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistors J Appl Phys 95 2004 4082 4084
16. Simoen E, Claeys C, Lukyanchikova N, Garbar N, Smolanka A. Linear-kink-noise suppression in partially-depleted SOI using the twin-gate MOSFET configuration. IEEE Electron Dev Lett, in press.
17. N. Lukyanchikova, N. Garbar, A. Smolanka, E. Simoen, and C. Claeys Excess Lorentzian noise in partially-depleted SOI nMOSFETs induced by an accumulation back-gate bias IEEE Electron Dev Lett 25 2004 433 435
18. Agopian PGD, Martino JA, Simoen E, Claeys C. Analysis of the linear kink effect in partially depleted SOI nMOSFETs. In: Claeys C, Swart JW, Morimoto NI, Verdonck P, editors. Proceedings of the microelectronics technology and devices-SBMicro 2005, The Electrochem Soc Ser, Princeton, NJ, 2005. p. 503-10.