On the origin of the 1/f1.7 noise in deep submicron partially depleted SOI transistors

European Solid-State Device Research Conference

Volumn , Issue , 2002, Pages 75-78

  Lukyanchikova, N ^a   Petrichuk, M ^a   Garbar, N ^a   Simoen, E ^b   Mercha, A ^b   Van Meer, H ^c   De Meyer, K ^c   Claeys, C ^c  

^a INSTITUTE OF SEMICONDUCTOR PHYSICS   (Ukraine)

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER TRAPPING; FREQUENCY DEPENDENCE; LENGTH DEPENDENCE; LINEAR OPERATIONS; LOW-FREQUENCY NOISE; PARTIALLY DEPLETED SILICON-ON-INSULATOR; PARTIALLY DEPLETED SOI; POLYSILICON GATES;

SILICON ON INSULATOR TECHNOLOGY;

EID: 84907687968     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2002.194874     Document Type: Conference Paper

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