FinFETs: From devices to architectures

Digitally-Assisted Analog and Analog-Assisted Digital IC Design

Volumn , Issue , 2015, Pages 21-55

  Bhattacharya, Debajit ^a   Jha, Niraj K ^a  

^a PRINCETON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DIELECTRIC MATERIALS; FIELD EFFECT TRANSISTORS; FINFET; GATES (TRANSISTOR); INTEGRATED CIRCUITS; LEAKAGE CURRENTS; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; TRANSISTORS;

DRAIN-INDUCED BARRIER LOWERING; FULLY DEPLETED SILICON-ON-INSULATOR; GATE INDUCED DRAIN LEAKAGES; GATE-CHANNEL CAPACITANCE; INTEGRATED CIRCUITS (ICS); MULTIPLE-GATE FIELD-EFFECT TRANSISTORS; SHORT-CHANNEL PERFORMANCE; SUB-THRESHOLD LEAKAGE CURRENTS;

MOSFET DEVICES;

EID: 84954157142     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1017/CBO9781316156148.003     Document Type: Chapter

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