BSIM - SPICE models enable FinFET and UTB IC designs

IEEE Access

Volumn 1, Issue , 2013, Pages 201-215

  Paydavosi, Navid ^a   Venugopalan, Sriramkumar ^a   Chauhan, Yogesh Singh ^a,b   Duarte, Juan Pablo ^a   Jandhyala, Srivatsava ^a   Niknejad, Ali M ^a   Hu, Chenming Calvin ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY KANPUR   (India)

Author keywords

Double gate FET; FinFET; Integrated circuit modeling; MOSFET compact model; RF FinFET; Short channel effects; SPICE; Triple gate FET; UTB SOI; UTBB SOI

Indexed keywords

MOSFET DEVICES; QUALITY ASSURANCE; QUANTUM THEORY; SPICE;

DOUBLE-GATE FETS; FINFET; INTEGRATED CIRCUIT MODELING; MOSFET COMPACT MODEL; RF FINFET; SHORT-CHANNEL EFFECT; TRIPLE-GATE; UTB-SOI; UTBB-SOI;

INTEGRATED CIRCUITS;

EID: 84891067897     PISSN: None     EISSN: 21693536     Source Type: Journal    
DOI: 10.1109/ACCESS.2013.2260816     Document Type: Article

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