Modeling and circuit synthesis for independently controlled double gate FinFET devices

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 11, 2007, Pages 1957-1966

  Datta, Animesh ^a   Goel, Ashish ^b   Cakici, Riza Tamer ^b   Mahmoodi, Hamid ^c   Lekshmanan, Dheepa ^b   Roy, Kaushik ^b  

^a QUALCOMM INC   (United States)

^b PURDUE UNIVERSITY   (United States)

^c SAN FRANCISCO STATE UNIVERSITY   (United States)

Author keywords

Analytical modeling; Circuit synthesis; CMOS; FinFET; Independent gate; Low power

Indexed keywords

ANALYTICAL MODELING; CIRCUIT SYNTHESIS; CMOS; FINFET; INDEPENDENT GATE; LOW POWER;

ELECTRIC NETWORK ANALYSIS; FIELD EFFECT TRANSISTORS; GALERKIN METHODS; GATES (TRANSISTOR); MOS DEVICES;

LOGIC CIRCUITS;

EID: 51949118050     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2007.896320     Document Type: Article

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