CMOS circuit performance enhancement by surface orientation optimization

IEEE Transactions on Electron Devices

Volumn 51, Issue 10, 2004, Pages 1621-1627

  Chang, Leland ^a   Ieong, Meikei ^a   Yang, Min ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRYSTAL ORIENTATION; DIELECTRIC MATERIALS; ELECTRON MOBILITY; GATES (TRANSISTOR); HOLE MOBILITY; INTEGRATED CIRCUIT MANUFACTURE; LEAKAGE CURRENTS; LOGIC GATES; MOSFET DEVICES; OPTIMIZATION; RELIABILITY;

CIRCUIT PERFORMANCE; FINFET; GATE DELAY; SURFACE ORIENTATION;

CMOS INTEGRATED CIRCUITS;

EID: 5444219526     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.834912     Document Type: Article

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