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Volumn , Issue , 2008, Pages 220-227

Threshold voltage control through multiple supply voltages for power-efficient FinFET interconnects

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER INSERTION; BULK CMOS; CIRCUIT DESIGNS; CIRCUIT EFFICIENCY; DEVICE AREA; DUAL VDD; FIELD EFFECT TRANSISTOR (FET); FINFETS; GA TE LENGTHS; INTERCONNECT DESIGN; INTERCONNECT SYNTHESIS; INTERNATIONAL CONFERENCES; MULTIPLE SUPPLY VOLTAGES; POWER EFFICIENT; POWER SAVINGS; PROGRAMMING FRAMEWORKS; ROUTING TREES; SUPPLY VOLTAGES; THRESHOLD VOLTAGE CONTROL; VLSI DESIGNS;

EID: 47649111580     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.2008.117     Document Type: Conference Paper
Times cited : (14)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.