FinCANON: A PVT-aware integrated delay and power modeling framework for FinFET-based caches and on-chip networks

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 22, Issue 5, 2014, Pages 1150-1163

  Lee, Chun Yi ^a   Jha, Niraj K ^a  

^a Princeton University   (United States)

Author keywords

CACTI PVT; FinCANON; FinFETs; ORION PVT; PVT variations.

Indexed keywords

COMPUTER SIMULATION; DESIGN; EMBEDDED SYSTEMS; MOSFET DEVICES;

CACTI-PVT; FINCANON; FINFETS; ORION-PVT; PVT VARIATIONS;

INTEGRATED CIRCUITS;

EID: 84899961856     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2013.2260569     Document Type: Article

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