Low-power FinFET circuit synthesis using multiple supply and threshold voltages

ACM Journal on Emerging Technologies in Computing Systems

Volumn 5, Issue 2, 2009, Pages

  Mishra, Prateek ^b   Muttreja, Anish ^a   Jha, Niraj K ^a  

^a PRINCETON UNIVERSITY   (United States)

^b Princeton University   (United States)

Author keywords

Linear programming; Low power; Synthesis; TCMS

Indexed keywords

AREA SAVINGS; BULK CMOS; CHANNEL CHARACTERISTICS; CIRCUIT EFFICIENCY; CIRCUIT SYNTHESIS; DEEP SUB-MICRON; DEEP SUB-MICRON TECHNOLOGY; DELAY CONSTRAINTS; GLOBAL INTERCONNECTS; HSPICE SIMULATIONS; LEAKAGE POWER; LOW-POWER; MOORE'S LAW; MULTIPLE SUPPLIES; MULTIPLE SUPPLY VOLTAGES; MULTIPLE-SUPPLY-VOLTAGE SCHEME; POWER DENSITIES; POWER EFFICIENCY; POWER OPTIMIZATION; POWER SAVINGS; SUBTHRESHOLD SLOPE; SUPPLY VOLTAGES; SYNTHESIS; TCMS; THRESHOLD CONTROL; TOTAL POWER CONSUMPTION; VOLTAGE LEVELS; VOLTAGE-SCALING; ZERO DELAY;

ANALOG TO DIGITAL CONVERSION; APPROXIMATION ALGORITHMS; CMOS INTEGRATED CIRCUITS; DYNAMIC PROGRAMMING; FIELD EFFECT TRANSISTORS; JITTER; LINEAR PROGRAMMING; LINEARIZATION; LOGIC CIRCUITS; LOGIC DESIGN; SWITCHING CIRCUITS; THRESHOLD VOLTAGE;

CONSTRAINED OPTIMIZATION;

EID: 68549118803     PISSN: 15504832     EISSN: 15504840     Source Type: Journal    
DOI: 10.1145/1543438.1543440     Document Type: Article

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