Non-planar device architecture for 15nm node: FinFET or trigate?

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2010, Pages

  Lin, Chung Hsun ^a   Chang, Josephine ^a   Guillorn, Michael ^a   Bryant, Andres ^a   Oldiges, Phil ^b   Haensch, Wilfried ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 78650572362     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2010.5641060     Document Type: Conference Paper

References (5)

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2. X. Huang et al., IEDM Tech. Dig., p.67, 1999.
3. B. Doyle et al., VLSI Tech. Dig., p. 133, 2003.
4. W. Haensch et al., IBM J. Res. & Dev., p. 339, 2006.
5. M. Guillorn et al., VLSI Tech. Dig., p.12, 2008.