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Volumn 59, Issue 8, 2012, Pages 2037-2041

Denser and more stable SRAM using FinFETs with multiple fin heights

Author keywords

Cell leakage; FinFET; noise margin; static random access memory (SRAM)

Indexed keywords

CELL LEAKAGE; CELL LEAKAGE CURRENTS; CHANNEL DOPINGS; FIN HEIGHT; FINFET; FINFETS; NOISE MARGINS; READ STABILITY; SRAM CELL; STATIC NOISE MARGIN; STATIC RANDOM ACCESS MEMORY;

EID: 84864772332     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2012.2199759     Document Type: Article
Times cited : (42)

References (13)
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  • 6
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    • DOI 10.1016/j.mee.2005.08.003, PII S0167931705004363
    • R. Granzner, "Simulation of nanoscale MOSFETs using modified drift-diffusion and hydrodynamic models and comparison with Monte Carlo results," Microelectron. Eng., vol. 83, no. 2, pp. 241-246, Feb. 2006. (Pubitemid 43199284)
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    • Granzner, R.1    Polyakov, V.M.2    Schwierz, F.3    Kittler, M.4    Luyken, R.J.5    Rosner, W.6    Stadele, M.7
  • 9
    • 39549119842 scopus 로고    scopus 로고
    • FinFET SRAM: Optimizing silicon fin thickness and fin ratio to improve stability at iso area
    • DOI 10.1109/CICC.2007.4405809, 4405809, Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC
    • D. Lekshmanan, A. Bansal, and K. Roy, "FinFET SRAM: Optimizing silicon fin thickness and fin ratio to improve stability at ISO area," in Proc. IEEE CICC, Sep. 16-19, 2007, pp. 623-626. (Pubitemid 351277061)
    • (2008) Proceedings of the Custom Integrated Circuits Conference , pp. 623-626
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  • 10
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    • DOI 10.1109/TED.2005.862697
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    • Ananthan, H.1    Roy, K.2
  • 12
    • 77952742597 scopus 로고    scopus 로고
    • A novel bottom spacer FinFET structure for improved short-channel, power-delay, and thermal performance
    • Jun.
    • M. Shrivastava, M. S. Baghini, D. K. Sharma, and V. R. Rao, "A novel bottom spacer FinFET structure for improved short-channel, power-delay, and thermal performance," IEEE Trans. Electron Devices, vol. 57, no. 6, pp. 1287-1294, Jun. 2010.
    • (2010) IEEE Trans. Electron Devices , vol.57 , Issue.6 , pp. 1287-1294
    • Shrivastava, M.1    Baghini, M.S.2    Sharma, D.K.3    Rao, V.R.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.