Optimizing finfet technology for high-speed and low-power design

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2007, Pages 73-77

  Sairam, Tarun ^a   Zhao, Wei ^b   Cao, Yu ^b  

^a SUN MICROSYSTEMS   (United States)

^b ARIZONA STATE UNIVERSITY   (United States)

Author keywords

Energy; FinFET; Noise margin; Power; Speed; Threshold voltage; Variations

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; LEAKAGE CURRENTS; LOGIC DESIGN; OPTIMIZATION; STANDBY POWER SERVICE;

CIRCUIT SPEED; NOISE MARGIN; TCAD SIMULATIONS;

FIELD EFFECT TRANSISTORS;

EID: 34748840102     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1228784.1228807     Document Type: Conference Paper

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