Resource-constrained system-on-a-chip test: A survey

IEE Proceedings: Computers and Digital Techniques

Volumn 152, Issue 1, 2005, Pages 67-81

  Xu, Q ^a   Nicolici, N ^a  

^a MCMASTER UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COSTS; DATA COMPRESSION; HEURISTIC PROGRAMMING; INTEGRATED CIRCUIT MANUFACTURE; LINEAR PROGRAMMING; OPTIMIZATION;

SYSTEM-ON-A-CHIP TEST; TEST ACCESS MECHANISM; TEST SCHEDULING;

INTEGRATED CIRCUIT TESTING;

EID: 15744395351     PISSN: 13502387     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1049/ip-cdt:20045019     Document Type: Review

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