Structural fault testing of embedded cores using pipelining

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 15, Issue 1, 1999, Pages 129-144

  Nourani, Mehrdad ^a,c,d   Papachristou, Christos A ^b,e  

^a The University of Texas at Dallas   (United States)

^b Case Western Reserve University   (United States)

^c UNIVERSITY OF TEHRAN   (Iran)

^d CASE WESTERN RESERVE UNIVERSITY   (United States)

^e JOHNS HOPKINS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN FOR TESTABILITY; VLSI CIRCUITS;

EMBEDDED CORES; PIPELINED TEST SCHEDULE; STRUCTURAL FAULT TESTING;

INTEGRATED CIRCUIT TESTING;

EID: 0033357053     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008340519743     Document Type: Article

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