Test wrapper and test access mechanism co-optimization for system-on-chip

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 18, Issue 2, 2002, Pages 213-230

  Iyengar, Vikram ^a   Chakrabarty, Krishnendu ^a   Marinissen, Erik Jan ^b  

^a Duke University   (United States)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Embedded core testing; Integer linear programming; Test access mechanism (TAM); Test wrapper; Testing time

Indexed keywords

ALGORITHMS; INTEGER PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION;

TEST ACCESS MECHANISMS (TAM);

INTEGRATED CIRCUIT TESTING;

EID: 0036535137     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1014916913577     Document Type: Conference Paper

References (22)

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