Using an embedded processor for efficient deterministic testing of systems-on-a-chip

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1999, Pages 418-423

  Jas, Abhijit ^a   Touba, Nur A ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; EMBEDDED SYSTEMS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS; RESPONSE TIME (COMPUTER SYSTEMS);

EMBEDDED PROCESSORS; SYSTEMS-ON-A-CHIP;

VLSI CIRCUITS;

EID: 0033297638     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (16)