-
1
-
-
0012082866
-
Test economics for multi-site test with modern cost reduction techniques
-
E. H. Volkerink, A. Khoche, J. Rivoir, and K. D. Hilliges. Test economics for multi-site test with modern cost reduction techniques. In Proc. VLSI Test Symp., pages 411-416, 2002
-
(2002)
Proc. VLSI Test Symp
, pp. 411-416
-
-
Volkerink, E.H.1
Khoche, A.2
Rivoir, J.3
Hilliges, K.D.4
-
2
-
-
0032667182
-
Testing embedded-core-based system chips
-
Y. Zorian, E. J. Marinissen, and S. Dey. Testing embedded-core-based system chips. Computer, 32(6):52-60, 1999
-
(1999)
Computer
, vol.32
, Issue.6
, pp. 52-60
-
-
Zorian, Y.1
Marinissen, E.J.2
Dey, S.3
-
3
-
-
0017493286
-
A universal algorithm for sequential data compression
-
May
-
J. Ziv and A. Lempel. A universal algorithm for sequential data compression. IEEE Trans. on Information Theory, 23(3):337-343, May 1977
-
(1977)
IEEE Trans. on Information Theory
, vol.23
, Issue.3
, pp. 337-343
-
-
Ziv, J.1
Lempel, A.2
-
4
-
-
0018019231
-
Compression of individual sequences via variable rate coding
-
J. Ziv and A. Lempel. Compression of individual sequences via variable rate coding. IEEE Trans. on Information Theory, 24(5):530-536, 1978
-
(1978)
IEEE Trans. on Information Theory
, vol.24
, Issue.5
, pp. 530-536
-
-
Ziv, J.1
Lempel, A.2
-
6
-
-
0034224167
-
First results of itc?99 benchmark res ults
-
July
-
L. Basto. First Results of ITC?99 benchmark res ults. IEEE Design & Test of Computers, 17(3):54-59, July 2000
-
(2000)
IEEE Design & Test of Computers
, vol.17
, Issue.3
, pp. 54-59
-
-
Basto, L.1
-
7
-
-
0003382839
-
Itc?99 benchmark circuits-preliminary results
-
S. Davidson. ITC?99 Benchmark Circuits-Preliminary Results. In Int' l Test Conf., pages 1125-1125, 1999
-
(1999)
Int' L Test Conf
, pp. 1125-1125
-
-
Davidson, S.1
-
8
-
-
0036456025
-
Multiscan-based test compression and hardware decomposition using lz77
-
Wolff, F. G., Papachristou, C., ?Multiscan-based Test Compression and Hardware Decomposition Using LZ77,? ITC, 2002
-
(2002)
ITC
-
-
Wolff, F.G.1
Papachristou, C.2
-
9
-
-
0035687658
-
Opmisr: The foundation for compressed atpg vectors
-
C. Barnhart, V. Brunkhorst, F. Distler, O. Farnsworth, B. Keller, and B. Koeneman. Opmisr: The foundation for compressed atpg vectors. In Proc. Int' l Test Conf., pages 748-757, 2001
-
(2001)
Proc. Int' L Test Conf
, pp. 748-757
-
-
Barnhart, C.1
Brunkhorst, V.2
Distler, F.3
Farnsworth, O.4
Keller, B.5
Koeneman, B.6
-
10
-
-
0035271735
-
System-on-A-chip testdata compression and decompression architecture based on golomb codes
-
March
-
A. Chandra and K. Chakrabarty. System-on-A-chip testdata compression and decompression architecture based on golomb codes. IEEE Trans. on CAD/ICAS, (3):355-368, March 2001
-
(2001)
IEEE Trans. on CAD/ICAS
, vol.3
, pp. 355-368
-
-
Chandra, A.1
Chakrabarty, K.2
-
11
-
-
0036048211
-
Reduction of soc test data volume, scan power and testing time using alternating runlength codes
-
June
-
A. Chandra and K. Chakrabarty. Reduction of soc test data volume, scan power and testing time using alternating runlength codes. In Proc. Design Automation Conference, pages 673-678, June 2002
-
(2002)
Proc. Design Automation Conference
, pp. 673-678
-
-
Chandra, A.1
Chakrabarty, K.2
-
12
-
-
0035683949
-
Tailoring atpg for embedded testing
-
R. Dorsch and H.-J. Wunderlich. Tailoring atpg for embedded testing. In Int' l Test Conf., pages 530-537, 2001
-
(2001)
Int' L Test Conf
, pp. 530-537
-
-
Dorsch, R.1
Wunderlich, H.-J.2
-
13
-
-
0035701567
-
Dynamic test compression using statisical coding
-
H. Ichihara, A. Ogawa, T. Inoue, and A. Tamura. Dynamic test compression using statisical coding. In Proc. of Asian Test Symposium, pages 143-148, 2001
-
(2001)
Proc. of Asian Test Symposium
, pp. 143-148
-
-
Ichihara, H.1
Ogawa, A.2
Inoue, T.3
Tamura, A.4
-
14
-
-
0033322164
-
Deterministic built-in pattern generation for sequential circuits
-
October
-
V. Iyengar, K. Chakrabarty, and B. T. Murray. Deterministic built-in pattern generation for sequential circuits. JETTA, 15:97-115, October 1999
-
(1999)
JETTA
, vol.15
, pp. 97-115
-
-
Iyengar, V.1
Chakrabarty, K.2
Murray, B.T.3
-
15
-
-
0032682922
-
Scan vector compression/decompression using statisical coding
-
April
-
A. Jas, J. Ghosh-Dastidar, and N. A. Touba. Scan vector compression/decompression using statisical coding. In Proc. VLSI Test Symp., pages 114-120, April 1999
-
(1999)
Proc. VLSI Test Symp
, pp. 114-120
-
-
Jas, A.1
Ghosh-Dastidar, J.2
Touba, N.A.3
-
16
-
-
0032318126
-
Test vector decompression via cyclical scan chains
-
A. Jas and N. Touba. Test vector decompression via cyclical scan chains. In Proc. Int' l Test Conf., pages 458-464, 1998
-
(1998)
Proc. Int' L Test Conf
, pp. 458-464
-
-
Jas, A.1
Touba, N.2
-
17
-
-
0035215677
-
On identifying don' t care inputs of test patterns for combinational circuits
-
S. Kajihara and K. Miyase. On identifying don' t care inputs of test patterns for combinational circuits. In Proc. Int' l Conf. Computer-Aided Design, pages 364-369, 2001
-
(2001)
Proc. Int' L Conf. Computer-Aided Design
, pp. 364-369
-
-
Kajihara, S.1
Miyase, K.2
-
18
-
-
84948405377
-
Test vector compression using eda-Ate synergies
-
A. Khoche, E. H. Volkerink, J. Rivoir, and S. Mitra. Test vector compression using eda-Ate synergies. In Proc. VLSI Test Symp., pages 97-102, 2002
-
(2002)
Proc. VLSI Test Symp
, pp. 97-102
-
-
Khoche, A.1
Volkerink, E.H.2
Rivoir, J.3
Mitra, S.4
-
19
-
-
0035704290
-
A smartbist variant with guaranteed encoding
-
B. Koeneman, C. Barnhart, B. Keller, T. Snethen, O. Farnsworth, and D. Wheater. A smartbist variant with guaranteed encoding. In Proc. Asian Test Conf., pages 325-330, 2001
-
(2001)
Proc. Asian Test Conf
, pp. 325-330
-
-
Koeneman, B.1
Barnhart, C.2
Keller, B.3
Snethen, T.4
Farnsworth, O.5
Wheater, D.6
-
20
-
-
0035701460
-
Dft for high-quality low cost manufacturing test
-
J. Rajski. Dft for high-quality low cost manufacturing test. In Asian Test Symp., pages 3-8, 2001
-
(2001)
Asian Test Symp
, pp. 3-8
-
-
Rajski, J.1
-
23
-
-
0021439618
-
A technique for high-performance data compression
-
June
-
T. A. Welch. A technique for high-performance data compression. IEEE Computer, 17(6):8-19, June 1984
-
(1984)
IEEE Computer
, vol.17
, Issue.6
, pp. 8-19
-
-
Welch, T.A.1
-
24
-
-
0030675656
-
Hardware efficient updating technique of LZW CODEC design
-
C. Su, C. Yen, J. Yo. Hardware efficient updating technique of LZW CODEC design. Proc. Circuit and Systems Symp., pages 2797-2800, 1997
-
(1997)
Proc. Circuit and Systems Symp
, pp. 2797-2800
-
-
Su, C.1
Yen, C.2
Yo, J.3
|