메뉴 건너뛰기




Volumn 2003-January, Issue , 2003, Pages 219-224

Test data compression using dictionaries with fixed-length indices [SOC testing]

Author keywords

Automatic testing; Benchmark testing; Built in self test; Circuit faults; Circuit testing; Dictionaries; Graph theory; Logic testing; System on a chip; Test data compression

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; AUTOMATIC TESTING; BUILT-IN SELF TEST; DATA REDUCTION; DESIGN FOR TESTABILITY; DIGITAL STORAGE; GLOSSARIES; GRAPH THEORY; INTEGRATED CIRCUIT TESTING; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP; VLSI CIRCUITS;

EID: 15844377436     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2003.1197654     Document Type: Conference Paper
Times cited : (82)

References (26)
  • 1
    • 0035687658 scopus 로고    scopus 로고
    • OPMISR: The foundation for compressed ATPG vectors
    • C. Barnhart et al., "OPMISR: the foundation for compressed ATPG vectors", Proc. Int. Test Conf., pp. 748-757, 2001.
    • (2001) Proc. Int. Test Conf. , pp. 748-757
    • Barnhart, C.1
  • 2
    • 0034848095 scopus 로고    scopus 로고
    • Test volume and application time reduction through scan chain concealment
    • I. Bayraktaroglu and A. Orailoglu, "Test volume and application time reduction through scan chain concealment", Proc. ACM/IEEE Design Automation Conf., pp. 151-155, 2001.
    • (2001) Proc. ACM/IEEE Design Automation Conf. , pp. 151-155
    • Bayraktaroglu, I.1    Orailoglu, A.2
  • 3
    • 0034994812 scopus 로고    scopus 로고
    • Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression
    • A. Chandra and K. Chakrabarty, "Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression," Proc. VLSITest Symp., pp. 42-47, 2001.
    • (2001) Proc. VLSITest Symp. , pp. 42-47
    • Chandra, A.1    Chakrabarty, K.2
  • 4
    • 0035271735 scopus 로고    scopus 로고
    • System-on-a-chip test data compression and decompression architectures based on Golomb codes
    • March
    • A. Chandra and K. Chakrabarty, "System-on-a-chip test data compression and decompression architectures based on Golomb codes", IEEE Trans. Computer-Aided Design, vol. 20, pp. 355-368, March 2001.
    • (2001) IEEE Trans. Computer-Aided Design , vol.20 , pp. 355-368
    • Chandra, A.1    Chakrabarty, K.2
  • 6
    • 0035015857 scopus 로고    scopus 로고
    • A geometric-primitives-based compression scheme for testing systems-on-chip
    • A. El-Maleh, S. al Zahir, and E. Khan, "A geometric-primitives-based compression scheme for testing systems-on-chip", Proc. VLSITest Symp., pp. 54-59, 2001.
    • (2001) Proc. VLSITest Symp. , pp. 54-59
    • El-Maleh, S.1    Al Zahir, E.2    Khan, A.3
  • 7
    • 77956428048 scopus 로고    scopus 로고
    • Extended Frequency-Directed Run-Length Codes with Improved Application to System-on-a-Chip Test Data Compression
    • A. El-Maleh and R. Al-Abaji, "Extended Frequency-Directed Run-Length Codes with Improved Application to System-on-a-Chip Test Data Compression", Proc. Int. Conf. Electronics, Circuits and Systems, pp. 449-452, 2002.
    • (2002) Proc. Int. Conf. Electronics, Circuits and Systems , pp. 449-452
    • El-Maleh, A.1    Al-Abaji, R.2
  • 9
    • 84893771642 scopus 로고    scopus 로고
    • Improving compression ratio, area overhead, and test application time for system-on-a-chip test data compression/decompression
    • P. T. Gonciari, B. Al-Hashimi and N. Nicolici, "Improving compression ratio, area overhead, and test application time for system-on-a-chip test data compression/decompression", Proc. Design, Automation and Test in Europe Conf., pp. 604-611, 2002.
    • (2002) Proc. Design, Automation and Test in Europe Conf. , pp. 604-611
    • Gonciari, P.T.1    Al-Hashimi, B.2    Nicolici, N.3
  • 10
    • 0032320384 scopus 로고    scopus 로고
    • Test set compaction algorithms for combinational circuits
    • I. Hamzaoglu and J. H. Patel, "Test set compaction algorithms for combinational circuits", Proc. Int. Conf. CAD, pp. 283-289, 1998.
    • (1998) Proc. Int. Conf. CAD , pp. 283-289
    • Hamzaoglu, I.1    Patel, J.H.2
  • 11
  • 12
    • 0035687712 scopus 로고    scopus 로고
    • A case study on the implementation of Illinois scan architecture
    • F. F. Hsu, K. M. Butler and J. H. Patel, "A case study on the implementation of Illinois scan architecture", Proc. Int. Test Conf., pp. 538-547, 2001.
    • (2001) Proc. Int. Test Conf. , pp. 538-547
    • Hsu, F.F.1    Butler, K.M.2    Patel, J.H.3
  • 13
    • 0033322164 scopus 로고    scopus 로고
    • Deterministic built-in pattern generation for sequential circuits
    • V. Iyengar, K. Chakrabarty and B. T. Murray, "Deterministic built-in pattern generation for sequential circuits," JETTA, vol. 15, pp. 97-115, 1999
    • (1999) JETTA , vol.15 , pp. 97-115
    • Iyengar, V.1    Chakrabarty, K.2    Murray, B.T.3
  • 14
    • 0032318126 scopus 로고    scopus 로고
    • Test vector decompression via cyclical scan chains and its application to testing core-based design
    • A. Jas and N. A. Touba, "Test vector decompression via cyclical scan chains and its application to testing core-based design", Proc. Int. Test Conf., pp. 458-464, 1998.
    • (1998) Proc. Int. Test Conf. , pp. 458-464
    • Jas, A.1    Touba, N.A.2
  • 15
    • 0032682922 scopus 로고    scopus 로고
    • Scan vector compression/decompression using statistical coding
    • A. Jas, J. Ghosh-Dastidar and N. A. Touba, "Scan vector compression/decompression using statistical coding," Proc. VLSITest Symp., pp. 114-120, 1999.
    • (1999) Proc. VLSITest Symp. , pp. 114-120
    • Jas, A.1    Ghosh-Dastidar, J.2    Touba, N.A.3
  • 16
    • 0035704290 scopus 로고    scopus 로고
    • A SmartBIST variant with guaranteed encoding
    • B. Koenemann et al., "A SmartBIST variant with guaranteed encoding," Proc. Asian Test Symp., pp. 325-330, 2001.
    • (2001) Proc. Asian Test Symp. , pp. 325-330
    • Koenemann, B.1
  • 17
    • 0036446078 scopus 로고    scopus 로고
    • Embedded deterministic test for low-cost manufacturing test
    • J. Rajski et al., "Embedded deterministic test for low-cost manufacturing test," Proc. Int. Test Conf., pp. 301-310, 2002.
    • (2002) Proc. Int. Test Conf. , pp. 301-310
    • Rajski, J.1
  • 22
    • 0030388310 scopus 로고    scopus 로고
    • Altering a pseudo-random bit sequence for scan based BIST
    • N. A. Touba and E. J. McCluskey, "Altering a pseudo-random bit sequence for scan based BIST", Proc. Int. Test Conf., pp. 167-175, 1996.
    • (1996) Proc. Int. Test Conf. , pp. 167-175
    • Touba, N.A.1    McCluskey, E.J.2
  • 23
    • 0036444431 scopus 로고    scopus 로고
    • Packet-based input test data compression techniques
    • E. H. Volkerink, A. Khoche and S. Mitra, "Packet-based input test data compression techniques", Proc. Int. Test Conf., pp. 154-163, 2002.
    • (2002) Proc. Int. Test Conf. , pp. 154-163
    • Volkerink, E.H.1    Khoche, A.2    Mitra, S.3
  • 25
    • 0036456025 scopus 로고    scopus 로고
    • Multiscan-based test compression and hardware decompression using LZ77
    • F. G. Wolff and C. Papachristou, "Multiscan-based test compression and hardware decompression using LZ77", Proc. Int. Test Conf., pp. 331-339, 2002.
    • (2002) Proc. Int. Test Conf. , pp. 331-339
    • Wolff, F.G.1    Papachristou, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.