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Volumn 2003-January, Issue , 2003, Pages 107-112

Application of Saluja-Karpovsky compactors to test responses with many unknowns

Author keywords

Circuit testing; Cities and towns; Compaction; Design for testability; Engineering profession; Error correction codes; Hardware; Logic testing; Pins; Shift registers

Indexed keywords

CODES (SYMBOLS); COMPACTION; COMPUTER HARDWARE; DESIGN FOR TESTABILITY; ERROR CORRECTION; ERRORS; HARDWARE; LOGIC CIRCUITS; PROFESSIONAL ASPECTS; SHIFT REGISTERS; VLSI CIRCUITS;

EID: 84943569678     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2003.1197640     Document Type: Conference Paper
Times cited : (95)

References (12)
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    • Hamming, R.W.1
  • 2
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    • Algebraic decoding for a binary erasure channel
    • M. A. Epstein, "Algebraic decoding for a binary erasure channel," in IRE Natl. Conv. Rec., volume 6, pages 56-69, 1958, Part 4.
    • (1958) IRE Natl. Conv. Rec. , vol.6 , pp. 56-69
    • Epstein, M.A.1
  • 3
    • 50549175697 scopus 로고
    • On a class of error correction binary group codes
    • R. C. Bose, D. K. Ray-Chaudhuri, "On a class of error correction binary group codes," Inf. Control, 3:68-79, 1960.
    • (1960) Inf. Control , vol.3 , pp. 68-79
    • Bose, R.C.1    Ray-Chaudhuri, D.K.2
  • 5
    • 0002553777 scopus 로고
    • Signature analysis: A new digital field service method
    • May
    • R. A. Frohwerk, "Signature analysis: A new digital field service method," HP Journal, pages 2-8, May 1977.
    • (1977) HP Journal , pp. 2-8
    • Frohwerk, R.A.1
  • 7
    • 0020951614 scopus 로고
    • Testing computer hardware through data compression in space and time
    • K. K. Saluja, M. Karpovsky, "Testing computer hardware through data compression in space and time," in Proc. IEEE Intl. Test Conf., pages 83-89, 1983.
    • (1983) Proc. IEEE Intl. Test Conf. , pp. 83-89
    • Saluja, K.K.1    Karpovsky, M.2
  • 8
    • 0036443042 scopus 로고    scopus 로고
    • X-compact: An efficient response compaction technique for test cost reduction
    • S. Mitra, K. S. Kim, "X-compact: an efficient response compaction technique for test cost reduction," in Proc. IEEE Intl. Test. Conf., pages 311-320, 2002.
    • (2002) Proc. IEEE Intl. Test. Conf. , pp. 311-320
    • Mitra, S.1    Kim, K.S.2
  • 11
    • 0032597651 scopus 로고    scopus 로고
    • Reducing test application time for full scan embedded cores
    • June
    • I. Hamzaoglu, J. H. Patel, "Reducing test application time for full scan embedded cores," in Proc. on Fault-Tolerant Comp. Symp., pages 260-267, June 1999.
    • (1999) Proc. on Fault-Tolerant Comp. Symp. , pp. 260-267
    • Hamzaoglu, I.1    Patel, J.H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.