A Generic Resource Distribution and Test Scheduling Scheme for Embedded Core-Based SoCs

IEEE Transactions on Instrumentation and Measurement

Volumn 53, Issue 2, 2004, Pages 318-329

  Zhao, Dan ^a   Upadhyaya, Shambhu J ^a  

^a the State University of New York   (United States)

Author keywords

Built in self test (BIST); Design for testability (DFT); IDDQ; Resource balancing; System on a chip (SoC) test scheduling; Test sets selection

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; CONTROL SYSTEMS; DESIGN FOR TESTABILITY; INTELLECTUAL PROPERTY; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; PROBLEM SOLVING; SCHEDULING; STATIC RANDOM ACCESS STORAGE;

BUILT-IN SELF TEST (BIST); IDDQ; RESOURCE BALANCING; SYSTEM-ON-A-CHIP (SOC) TEST SCHEDULING; TEST SETS SELECTION;

EMBEDDED SYSTEMS;

EID: 1842429780     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2003.822712     Document Type: Article

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