Built-in self testing of sequential circuits using precomputed test sets

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1998, Pages 418-423

  Iyengar, V ^a   Chakrabarty, K ^a   Murray, B T ^a  

^a BOSTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; EFFICIENCY; EMBEDDED SYSTEMS; ENCODING (SYMBOLS); FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING;

PRECOMPUTED TEST SETS;

SEQUENTIAL CIRCUITS;

EID: 0032318593     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)