ATPG padding and ATE vector repeat per port for reducing test data volume

IEEE International Test Conference (TC)

Volumn , Issue , 2003, Pages 1069-1078

  Vranken, Harald ^a   Hapke, Friedrich ^b   Rogge, Soenke ^b   Chindamo, Domenico ^c   Volkerink, Erik ^d  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Germany)

^c DfT Center of Expertise   (Italy)

^d AGILENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; TRANSISTORS; VECTORS;

INDUSTRIAL CIRCUITS;

INTEGRATED CIRCUITS;

EID: 0142153661     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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