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Volumn 52, Issue 3, 2019, Pages

A survey of timing verification techniques for multi-core real-time systems

Author keywords

Architecture; Co runner interference; Multi core; Real time systems; Schedulability analysis; Timing analysis; WCET

Indexed keywords

ARCHITECTURE; INTERACTIVE COMPUTER SYSTEMS; SURVEYS; TIMING CIRCUITS;

EID: 85068038532     PISSN: 03600300     EISSN: 15577341     Source Type: Journal    
DOI: 10.1145/3323212     Document Type: Review
Times cited : (67)

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