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Volumn 9, Issue 2, 2015, Pages 51-72

Scratchpad memory architectures and allocation algorithms for hard real-time multicore processors

Author keywords

Hard real time system; Multicore processors; Scratch pad memory (SPM); Worst case execution time (WCET)

Indexed keywords

ALGORITHMS; CACHE MEMORY; CODE CONVERTERS; COMPUTER ARCHITECTURE; ENERGY EFFICIENCY; INTEGRATED CIRCUIT DESIGN; INTERACTIVE COMPUTER SYSTEMS; MEMORY ARCHITECTURE; MICROPROCESSOR CHIPS; MULTICORE PROGRAMMING;

EID: 85008251751     PISSN: 19764677     EISSN: 20938020     Source Type: Journal    
DOI: 10.5626/JCSE.2015.9.2.51     Document Type: Article
Times cited : (12)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.