A generic and compositional framework for multicore response time analysis

ACM International Conference Proceeding Series

Volumn 04-06-November-2015, Issue , 2015, Pages 129-138

  Altmeyer, Sebastian ^a,b   Davis, Robert I ^c,d   Indrusiak, Leandro ^c   Maiza, Claire ^e   Nelis, Vincent ^f   Reineke, Jan ^g  

^a UNIVERSITY OF LUXEMBOURG   (Luxembourg)

^b UNIVERSITY OF AMSTERDAM   (Netherlands)

^c UNIVERSITY OF YORK   (United Kingdom)

^d INRIA ROCQUENCOURT   (France)

^e VERIMAG   (France)

^f POLYTECHNIC INSTITUTE OF PORTO   (Portugal)

^g SAARLAND UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; DYNAMIC RANDOM ACCESS STORAGE; HARDWARE; RESPONSE TIME (COMPUTER SYSTEMS); ROUTERS; SOFTWARE ARCHITECTURE; TIME DIVISION MULTIPLE ACCESS;

CONTEXT INDEPENDENT; HARDWARE CONFIGURATIONS; HARDWARE RESOURCES; INSTRUCTION MEMORY; MULTI-CORE SYSTEMS; MULTICORE ARCHITECTURES; RESPONSE-TIME ANALYSIS; TIMING VERIFICATION;

REAL TIME SYSTEMS;

EID: 84959480018     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2834848.2834862     Document Type: Conference Paper

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