A Framework for the Derivation of WCET Analyses for Multi-core Processors

Proceedings - Euromicro Conference on Real-Time Systems

Volumn 2016-August, Issue , 2016, Pages 141-151

  Jacobs, Michael ^a   Hahn, Sebastian ^a   Hack, Sebastian ^a  

^a SAARLAND UNIVERSITY   (Germany)

Author keywords

formal framework; multi core processors; shared resource interference; WCET analysis

Indexed keywords

HARDWARE; INTERACTIVE COMPUTER SYSTEMS; REAL TIME SYSTEMS; RECONFIGURABLE HARDWARE;

FORMAL FRAMEWORK; HARDWARE PLATFORM; HARDWARE RESOURCES; INTERFERENCE EFFECTS; MULTI-CORE PROCESSOR; SHARED RESOURCES; WCET ANALYSIS; WORST-CASE EXECUTION TIME ANALYSIS;

MULTICORE PROGRAMMING;

EID: 84989949041     PISSN: 10683070     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECRTS.2016.19     Document Type: Conference Paper

References (27)

1. R. Wilhelm et al., "The worst-case execution-time problem-overview of methods and survey of tools, " ACM Trans. Embed. Comput. Syst., vol. 7, no. 3, pp. 36: 1-36: 53, 2008.
2. S. Thesing, "Safe and precise WCET determination by abstract interpretation of pipeline models, " Ph. D. dissertation, 2004.
3. X. Li et al., "Modeling out-of-order processors for WCET analysis, " Real-Time Syst., vol. 34, no. 3, pp. 195-227, 2006.
4. A. Abel et al., "Impact of resource sharing on performance and performance prediction: A survey, " in Proceedings of the 24th Conference on Concurrency Theory, 2013, pp. 25-43.
5. A. Schranzhofer et al., "Timing analysis for TDMA arbitration in resource sharing systems, " in Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010, pp. 215-224.
6. R. Pellizzoni et al., "Worst case delay analysis for memory interference in multicore systems, " in Proceedings of the 13th Conference on Design, Automation and Test in Europe, 2010, pp. 741-746.
7. A. Schranzhofer et al., "Timing analysis for resource access interference on adaptive resource arbiters, " in Proceedings of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2011, pp. 213-222.
8. G. Giannopoulou et al., "Timed model checking with abstractions: Towards worst-case response time analysis in resource-sharing manycore systems, " in Proceedings of the 10th ACM International Conference on Embedded Software, 2012, pp. 63-72.
9. Y. Liang et al., "Timing analysis of concurrent programs running on shared cache multi-cores, " Real-Time Systems, vol. 48, pp. 638-680, 2012.
10. J. Nowotsch, "Interference-sensitive worst-case execution time analysis for multi-core processors, " Ph. D. dissertation, 2014.
11. D. Dasari et al., "Response time analysis of COTS-based multicores considering the contention on the shared memory bus, " in Proceedings of the 10th IEEE International Conference on Trust, Security and Privacy in Computing and Communications, 2011, pp. 1068-1075.
12. D. Dasari and V. Nélis, "An analysis of the impact of bus contention on the WCET in multicores, " in Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & the 9th IEEE International Conference on Embedded Software and Systems, 2012, pp. 1450-1457.
13. S. Schliecker and R. Ernst, "Real-time performance analysis of multiprocessor systems with shared memory, " ACM Trans. Embedded Comput. Syst., vol. 10, no. 2, p. 22, 2010.
14. S. Schliecker et al., "Response time analysis in multicore ECUs with shared resources, " IEEE Trans. Industrial Informatics, vol. 5, no. 4, pp. 402-413, 2009.
15. S. Altmeyer et al., "A generic and compositional framework for multicore response time analysis, " in Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015, pp. 129-138.
16. S. Chattopadhyay et al., "A unified WCET analysis framework for multi-core platforms, " in Proceedings of the 18th IEEE Real-Time and Embedded Technology and Applications Symposium, 2012, pp. 99-108.
17. M. Jacobs et al., "WCET analysis for multi-core processors with shared buses and event-driven bus arbitration, " in Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015, pp. 193-202.
18. S. Hahn et al., "Towards compositionality in execution time analysis-definition and challenges, " in Proceedings of the 6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systems, 2013.
19. T. Lundqvist and P. Stenstrom, "Timing anomalies in dynamically scheduled microprocessors, " in Proceedings of the 20th IEEE Real-Time Systems Symposium, 1999, pp. 12-21.
20. T. Kelter and P. Marwedel, "Parallelism analysis: Precise WCET values for complex multi-core systems, " in Revised Selected Papers of the 3rd International Workshop on Formal Techniques for Safety-Critical Systems, 2014, pp. 142-158.
21. J. Reineke and R. Sen, "Sound and efficient WCET analysis in the presence of timing anomalies, " in Proceedings of the 9th International Workshop on Worst-Case Execution Time Analysis, 2009, pp. 98-108.
22. M. Jacobs, "Improving the precision of approximations in WCET analysis for multi-core processors, " in Proceedings of the 7th Junior Researcher Workshop on Real-Time Computing, 2013, pp. 1-4.
23. P. Cousot and R. Cousot, "Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints, " in Conference Record of the 4th Annual ACM SIGPLANSIGACT Symposium on Principles of Programming Languages, 1977, pp. 238-252.
24. R. Pellizzoni and M. Caccamo, "Impact of peripheral-processor interference on WCET analysis of real-time embedded systems, " IEEE Transactions on Computers, vol. 59, pp. 400-415, 2010.
25. M. Jacobs et al., "A framework for the derivation of WCET analyses for multi-core processors, " http: //www. cdl. uni-saarland. de/papers/jacobs fw wcet mc tr. pdf, Saarland University, Tech. Rep., 2016.
26. Y.-T. S. Li and S. Malik, "Performance analysis of embedded software using implicit path enumeration, " in Proceedings of the 32nd Annual ACM/IEEE Design Automation Conference, 1995, pp. 456-461.
27. J. Gustafsson et al., "The mälardalen WCET benchmarks-past, present and future, " in Proceedings of the 10th International Workshop on Worst-Case Execution Time Analysis, 2010.