WCET analysis for multi-core processors with shared buses and event-driven bus arbitration

ACM International Conference Proceeding Series

Volumn 04-06-November-2015, Issue , 2015, Pages 193-202

  Jacobs, Michael ^a   Hahn, Sebastian ^a   Hack, Sebastian ^a  

^a SAARLAND UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BUSES; COMPLEX NETWORKS; EMBEDDED SYSTEMS; PIPELINE PROCESSING SYSTEMS; PIPELINES; PROGRAM PROCESSORS; REAL TIME SYSTEMS;

DUAL CORE PROCESSORS; EXHAUSTIVE ENUMERATION; HARDWARE RESOURCES; MEMORY CONSUMPTION; MULTI-CORE PROCESSOR; SINGLE-CORE PROCESSORS; STATE OF THE ART; WORST-CASE EXECUTION TIME ANALYSIS;

MULTICORE PROGRAMMING;

EID: 84959550064     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2834848.2834872     Document Type: Conference Paper

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